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Volumn 55, Issue 7, 2012, Pages 105-114

Looking back and looking forward: Power, performance, and upheaval

Author keywords

[No Author keywords available]

Indexed keywords

CHIP POWER; DIVERSE APPLICATIONS; FUTURE APPLICATIONS; MICRO ARCHITECTURES; MICRO-ARCHITECTURE DESIGN; MICROPROCESSOR DESIGNS; MULTI-CORE PROCESSOR; POWER OPTIMIZATION; POWER PROFILE; REAL MEASUREMENTS; SYSTEM SOFTWARES;

EID: 84863752817     PISSN: 00010782     EISSN: 15577317     Source Type: Journal    
DOI: 10.1145/2209249.2209272     Document Type: Article
Times cited : (21)

References (19)
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  • 2
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    • Blackburn, S.M.1
  • 3
    • 44949253519 scopus 로고    scopus 로고
    • A 30 year retrospective on Dennard's MOSFET scaling paper
    • Bohr, M. A 30 year retrospective on Dennard's MOSFET scaling paper. IEEE SSCS Newsletter 12, 1 (2007), 11-13 (http://dx.doi.org/10.1109/N-SSC.2007. 4785534).
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    • Bohr, M.1
  • 5
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    • A characterization of processor performance in the VAX - 11/780
    • Emer, J.S., Clark, D.W. A characterization of processor performance in the VAX - 11/780. In ISCA (1984).
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    • Emer, J.S.1    Clark, D.W.2
  • 7
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    • Power provisioning for a warehouse-sized computer
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  • 10
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    • Runtime power monitoring in high-end processors: Methodology and empirical data
    • Isci, C., Martonosi, M. Runtime power monitoring in high-end processors: Methodology and empirical data. In MICRO (2003).
    • (2003) MICRO
    • Isci, C.1    Martonosi, M.2
  • 12
    • 85082385771 scopus 로고    scopus 로고
    • Dynamic voltage and frequency scaling: The laws of diminishing returns
    • Le Sueur, E., Heiser, G. Dynamic voltage and frequency scaling: the laws of diminishing returns. In HotPower (2010).
    • (2010) HotPower
    • Le Sueur, E.1    Heiser, G.2
  • 13
    • 76749146060 scopus 로고    scopus 로고
    • McPAT: An integrated power, area, and timing modeling framework for multicore and manycore architectures
    • Li, S., Ahn, J.H., Strong, R.D., Brockman, J.B., Tullsen, D.M., Jouppi, N.P. McPAT : an integrated power, area, and timing modeling framework for multicore and manycore architectures. In MICRO (2009).
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    • Li, S.1    Ahn, J.H.2    Strong, R.D.3    Brockman, J.B.4    Tullsen, D.M.5    Jouppi, N.P.6
  • 14
    • 33748857902 scopus 로고    scopus 로고
    • CMP design space exploration subject to physical contraints
    • Li, Y., Lee, B., Brooks, D., Hu, Z., Skadron, K. CMP design space exploration subject to physical contraints. In HPCA (2006).
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    • Li, Y.1    Lee, B.2    Brooks, D.3    Hu, Z.4    Skadron, K.5
  • 15
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    • Cramming more components onto integrated circuits
    • 19 Apr
    • Moore, G.E. Cramming more components onto integrated circuits. Electronics 38, 8 (19 Apr 1965), 114-117.
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  • 16
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    • The energy efficiency of CMP vs. SMT for multimedia workloads
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  • 18
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  • 19
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.