Wafer-scale fabrication of silicon nanowire arrays with controllable dimensions

Applied Surface Science

Volumn 258, Issue 22, 2012, Pages 8649-8655

  Wang, Wei ^a   Li, Dan ^a   Tian, Miao ^a   Lee, Yung Cheng ^a,b   Yang, Ronggui ^a  

^a UCB 450   (United States)

^b DARPA Center for Integrated Micro/Nano Electromechanical Transducers (IMINT)   (United States)

Author keywords

Dimension controllability; PAA template; Silicon nanowires

Indexed keywords

ALUMINA; ALUMINUM OXIDE; FABRICATION; NANOWIRES; WET ETCHING;

ANODIZATION VOLTAGES; PAA TEMPLATE; POROUS ANODIC ALUMINA TEMPLATE; SI NANOWIRE ARRAYS; SILICON NANOWIRE ARRAYS; SILICON NANOWIRES; THERMAL MANAGEMENT APPLICATIONS; WAFER SCALE FABRICATION;

SILICON WAFERS;

EID: 84863531119     PISSN: 01694332     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.apsusc.2012.05.067     Document Type: Article

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