Chip to wafer temporary bonding with self-alignment by patterned FDTS layer for size-free MEMS integration

Proceedings of IEEE Sensors

Volumn , Issue , 2011, Pages 1121-1124

  Lu, Jian ^a   Takagi, Hideki ^a   Maeda, Ryutaro ^a  

^a NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY AIST   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CAPILLARY FORCE; CARRIER WAFERS; LIFT-OFF PROCESS; MEMS CHIPS; OXIDIZED SILICON; PLASMA TREATMENT; SELF ALIGNMENT; SELF-ALIGNMENT PROCESS; UV IRRADIATION;

ALIGNMENT; HYDROPHOBICITY; PLASMA APPLICATIONS; SELF ASSEMBLED MONOLAYERS; SENSORS; SILICON COMPOUNDS; SILICON OXIDES;

WAFER BONDING;

EID: 84863038474     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICSENS.2011.6126924     Document Type: Conference Paper

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