메뉴 건너뛰기




Volumn , Issue , 2012, Pages 1110-1113

A hybrid HW-SW approach for intermittent error mitigation in streaming-based embedded systems

Author keywords

[No Author keywords available]

Indexed keywords

EMBEDDED SYSTEMS; ERRORS; FAILURE ANALYSIS; ION BEAMS; PROGRAMMABLE LOGIC CONTROLLERS; STATIC RANDOM ACCESS STORAGE;

EID: 84862102118     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/date.2012.6176661     Document Type: Conference Paper
Times cited : (9)

References (15)
  • 1
    • 28744454913 scopus 로고    scopus 로고
    • Random Charge Effects for PMOS NBTI in Ultra-Small Gate Area Devices
    • M. Agostinelli et al. Random Charge Effects for PMOS NBTI in Ultra-Small Gate Area Devices. In IRPS'05, 2005.
    • (2005) IRPS'05
    • Agostinelli, M.1
  • 2
    • 49749121091 scopus 로고    scopus 로고
    • Globally Optimized Robust Systems to Overcome Scaled CMOS Reliability Challenges
    • S. Mitra. Globally Optimized Robust Systems to Overcome Scaled CMOS Reliability Challenges. In DATE'08, 2008.
    • (2008) DATE'08
    • Mitra, S.1
  • 3
    • 20344374162 scopus 로고    scopus 로고
    • Niagara: A 32-Way Multithreaded SPARC Processor
    • P. Kongetira et al. Niagara: a 32-Way Multithreaded SPARC Processor. IEEE Micro, 25, 2005.
    • (2005) IEEE Micro , pp. 25
    • Kongetira, P.1
  • 4
    • 70350173853 scopus 로고    scopus 로고
    • 45nm Low-Power Embedded Pseudo-SRAM with ECC-Based Auto-Adjusted Self-Refresh Scheme
    • S. S. Pyo et al. 45nm Low-Power Embedded Pseudo-SRAM with ECC-Based Auto-Adjusted Self-Refresh Scheme. In ISCAS'09, 2009.
    • (2009) ISCAS'09
    • Pyo, S.S.1
  • 5
    • 77954030094 scopus 로고    scopus 로고
    • Impact of Scaling on Neutron-Induced Soft Error in SRAMs from a 250 nm to a 22 nm Design Rule
    • E. Ibe et al. Impact of Scaling on Neutron-Induced Soft Error in SRAMs From a 250 nm to a 22 nm Design Rule. IEEE Transactions on Electron Devices, 57, 2010.
    • (2010) IEEE Transactions on Electron Devices , pp. 57
    • Ibe, E.1
  • 6
    • 78649956455 scopus 로고    scopus 로고
    • Reliability-Driven ECC Allocation for Multiple Bit Error Resilience in Processor Cache
    • S. Paul et al. Reliability-Driven ECC Allocation for Multiple Bit Error Resilience in Processor Cache. IEEE Transactions on Computers, 60, 2011.
    • (2011) IEEE Transactions on Computers , pp. 60
    • Paul, S.1
  • 7
    • 47349100793 scopus 로고    scopus 로고
    • Multi-bit Error Tolerant Caches Using Two-Dimensional Error Coding
    • J. Kim et al. Multi-bit Error Tolerant Caches Using Two-Dimensional Error Coding. In MICRO-40, 2008.
    • (2008) MICRO-40
    • Kim, J.1
  • 8
    • 49749118625 scopus 로고    scopus 로고
    • A Case Study in Reliability-Aware Design: A Resilient LDPC Code Decoder
    • M. May et al. A Case Study in Reliability-Aware Design: A Resilient LDPC Code Decoder. In DATE'08, 2008.
    • (2008) DATE'08
    • May, M.1
  • 9
    • 57749207483 scopus 로고    scopus 로고
    • DeCoR: A Delayed Commit and Rollback Mechanism for Handling Inductive Noise in Processors
    • M. S. Gupta et al. DeCoR: A Delayed Commit and Rollback Mechanism for Handling Inductive Noise in Processors. In HPCA'08, 2008.
    • (2008) HPCA'08
    • Gupta, M.S.1
  • 10
    • 70350625325 scopus 로고    scopus 로고
    • Mitigating the Impact of Hardware Defect on Multimedia Application - A Cross-Layer Approach
    • K. Lee et al. Mitigating the Impact of Hardware Defect on Multimedia Application - A Cross-Layer Approach. In MM'08, 2008.
    • (2008) MM'08
    • Lee, K.1
  • 11
    • 0003272089 scopus 로고    scopus 로고
    • MediaBench: A Tool for Evaluating and Synthesizing Multimedia and Communications Systems
    • Ch. Lee et al. MediaBench: a Tool for Evaluating and Synthesizing Multimedia and Communications Systems. In MICRO'97, 1997.
    • (1997) MICRO'97
    • Lee, Ch.1
  • 14
    • 77953110390 scopus 로고    scopus 로고
    • ERSA: Error Resilient System Architecture for Probabilistic Applications
    • L. Leem et al. ERSA: Error Resilient System Architecture For Probabilistic Applications. In DATE'10, 2010.
    • (2010) DATE'10
    • Leem, L.1
  • 15
    • 22344451866 scopus 로고    scopus 로고
    • MPARM: Exploring the Multi-Processor SoC Design Space with SystemC
    • L. Benini et al. MPARM: Exploring the Multi-Processor SoC Design Space with SystemC. Journal of VLSI Signal Processing Systems, 41(2), 2005.
    • (2005) Journal of VLSI Signal Processing Systems , vol.41 , Issue.2
    • Benini, L.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.