메뉴 건너뛰기




Volumn 47, Issue 6, 2012, Pages 1448-1459

Associative memory for nearest-hamming-distance search based on frequency mapping

Author keywords

Associative memory; CMOS; frequency mapping; Hamming distance; process variation; reliability; word parallel search

Indexed keywords

ASSOCIATIVE MEMORIES; CMOS; FREQUENCY MAPPING; PROCESS VARIATION; WORD-PARALLEL SEARCH;

EID: 84861757829     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2012.2190191     Document Type: Article
Times cited : (23)

References (15)
  • 3
    • 0242443330 scopus 로고    scopus 로고
    • An image representation algorithm compatiblewith neural-associative- processor-based hardware recognition systems
    • M. Yagi and T. Shibata, "An image representation algorithm compatiblewith neural-associative-processor-based hardware recognition systems," IEEE Trans. Neural Networks, vol. 14, no. 5, pp. 1144-1161, 2003.
    • (2003) IEEE Trans. Neural Networks , vol.14 , Issue.5 , pp. 1144-1161
    • Yagi, M.1    Shibata, T.2
  • 5
    • 84893807011 scopus 로고    scopus 로고
    • Time-domain minimum-distance detector and its application to low power coding scheme on chip interface
    • Sep.
    • M. Ikeda and K. Asada, "Time-domain minimum-distance detector and its application to low power coding scheme on chip interface," in Proc. 24th Eur. Solid-State Circuits Conf. (ESSCIRC'98), Sep. 1998, pp. 464-467.
    • (1998) Proc. 24th Eur. Solid-State Circuits Conf. (ESSCIRC'98) , pp. 464-467
    • Ikeda, M.1    Asada, K.2
  • 6
    • 0036474678 scopus 로고    scopus 로고
    • Compact associative-memory architecture with fully parallel search capability for the minimum hamming distance
    • DOI 10.1109/4.982428, PII S0018920002006625
    • H. J. Mattausch, T. Gyohten, Y. Soda, and T. Koide, "Compact associative- memory architecture with fully-parallel search capability for the minimumhamming distance," IEEE J. Solid-State Circuits, vol. 37, no. 2, pp. 218-227, Feb. 2002. (Pubitemid 34278437)
    • (2002) IEEE Journal of Solid-State Circuits , vol.37 , Issue.2 , pp. 218-227
    • Mattausch, H.J.1    Gyohten, T.2    Soda, Y.3    Koide, T.4
  • 7
    • 3843143905 scopus 로고    scopus 로고
    • A high-speed and low-voltage associative co-processor with exact hamming/manhattan-distance estimation using word-parallel and hierarchical search architecture
    • Aug.
    • Y. Oike, M. Ikeda, and K. Asada, "A high-speed and low-voltage associative co-processor with exact hamming/manhattan-distance estimation using word-parallel and hierarchical search architecture," IEEE J. Solid-State Circuits, vol. 39, no. 8, pp. 1383-1387, Aug. 2004.
    • (2004) IEEE J. Solid-State Circuits , vol.39 , Issue.8 , pp. 1383-1387
    • Oike, Y.1    Ikeda, M.2    Asada, K.3
  • 8
    • 11944252393 scopus 로고    scopus 로고
    • A design for a minimum hamming-distance search using asynchronous digital techniques
    • DOI 10.1109/JSSC.2004.837966, IEEE 2004 ISSCC: Digital, Technology Directions, and Signal Processing
    • S. Nakahara and T. Kawata, "A design for a minimum Hamming-distance search using asynchronous digital techniques," IEEE J. Solid- State Circuits, vol. 40, no. 1, pp. 276-285, Jan. 2005. (Pubitemid 40099937)
    • (2005) IEEE Journal of Solid-State Circuits , vol.40 , Issue.1 , pp. 276-285
    • Nakahara, S.1    Kawata, T.2
  • 10
    • 0036175845 scopus 로고    scopus 로고
    • Design of high-performance CMOS priority encoders and incrementers/decrementers using multilevel lookahead and multilevel folding techniques
    • Jan.
    • C. H. Huang, J. S. Wang, and Y. C. Huang, "Design of high-performance CMOS priority encoders and incrementers/decrementers using multilevel lookahead and multilevel folding techniques," IEEE J. Solid-State Circuits, vol. 37, no. 1, pp. 63-76, Jan. 2002.
    • (2002) IEEE J. Solid-State Circuits , vol.37 , Issue.1 , pp. 63-76
    • Huang, C.H.1    Wang, J.S.2    Huang, Y.C.3
  • 12
    • 0000940491 scopus 로고
    • A theory o asynchronous circuits
    • Harvard Univ. Press
    • D. E. Muller and W. S. Bartky, "A theory o asynchronous circuits," in Proc. Int. Symp. Switching, Part 1, Harvard Univ. Press, 1959, pp. 204-243.
    • (1959) Proc. Int. Symp. Switching , Issue.PART 1 , pp. 204-243
    • Muller, D.E.1    Bartky, W.S.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.