SCOPUS 정보 검색 플랫폼

ESSCIRC 2010 - 36th European Solid State Circuits Conference

Volumn , Issue , 2010, Pages 538-541

Low-power word-parallel nearest-hamming-distance search circuit based on frequency mapping

(5) Mattausch, Hans Jürgen a Imafuku, Wataru a Ansari, Tania a Kawabata, Akio a Koide, Tetsushi a

a HIROSHIMA UNIVERSITY (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS TECHNOLOGY; DIGITAL DESIGNS; DISCRETE STEP; FREQUENCY MAPPING; HIGH ROBUSTNESS; LOW POWER; LOW-POWER CONSUMPTION; MOS-FET; POWER DISSIPATION; RING OSCILLATOR; SEARCH SPEED; SUPPLY VOLTAGES; TEST CHIPS;

CMOS INTEGRATED CIRCUITS; OSCILLATORS (ELECTRONIC);

HAMMING DISTANCE;

EID: 78650413214 PISSN: None EISSN: None Source Type: Conference Proceeding
DOI: 10.1109/ESSCIRC.2010.5619762 Document Type: Conference Paper

Times cited : (11)

References (7)

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2
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3
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4
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- Fully-Parallel Pattern-Matching Engine with Dynamic Adaptability to Hamming or Manhattan Distance
- June
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5
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6
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7
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- Mattausch, H.J.¹

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.