A 4.5Tb/s 3.4Tb/s/W 64x64 switch fabric with self-updating least-recently-granted priority and quality-of-service arbitration in 45nm CMOS

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 55, Issue , 2012, Pages 478-479

  Satpathy, Sudhir ^a   Sewell, Korey ^a   Manville, Thomas ^a   Chen, Yen Po ^a   Dreslinski, Ronald ^a   Sylvester, Dennis ^a   Mudge, Trevor ^a   Blaauw, David ^a  

^a UNIVERSITY OF MICHIGAN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

4-LEVEL; BASIC BUILDING BLOCK; BIT LINES; CENTRALIZED CONTROL; CHANNEL ALLOCATION; DATA BUS; FIXED PRIORITIES; HIGH PERFORMANCE SYSTEMS; HIGH-SPEED; INPUT AND OUTPUTS; INPUT PORT; INPUT/OUTPUT; INTERCONNECT FABRICS; KEY FEATURE; LIMITING PERFORMANCE; LOGIC BLOCKS; LOW POWER; MULTICASTS; ROUTING DATA; SENSE AMP; SINGLE CYCLE; SINGLE STAGE; SOI CMOS; SWITCH FABRIC; SWITCH TOPOLOGY;

DATA HANDLING; ENERGY EFFICIENCY; ROUTERS; SANITARY SEWERS; SWITCHING CIRCUITS; SYSTEM BUSES; THROUGHPUT; WIRE;

QUALITY OF SERVICE;

EID: 84860653566     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2012.6177098     Document Type: Conference Paper

References (8)

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