Low-cost binary128 floating-point FMA unit design with SIMD support

IEEE Transactions on Computers

Volumn 61, Issue 5, 2012, Pages 745-751

  Huang, Libo ^a   Ma, Sheng ^a   Shen, Li ^a   Wang, Zhiying ^a   Xiao, Nong ^a  

^a NATIONAL UNIVERSITY OF DEFENSE TECHNOLOGY   (China)

Author keywords

binary128; computer arithmetic; Floating point; fused multiply add; implementation; SIMD

Indexed keywords

BINARY128; COMPUTER ARITHMETIC; FLOATING POINTS; FUSED MULTIPLY-ADD; IMPLEMENTATION; SIMD;

COMPUTER ARCHITECTURE; COMPUTER HARDWARE; DIGITAL ARITHMETIC; HARDWARE;

DESIGN;

EID: 84859719343     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.2011.77     Document Type: Article

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