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0034453372
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50-nm vertical sidewall transistors with high channel doping concentrations
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Schulz, T.1
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Risch, L.3
Langmann, L.L.4
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2
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0035424985
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Short-channel vertical sidewall mosfets
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Schulz, T.1
Rosner, W.2
Risch, L.3
Korbel, A.4
Langmann, U.5
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3
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0032318731
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Selectively grown vertical si mos transistor with reduced overlap capacitances
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Kiaes, D,;Moers, J. ;Tonnesmann, A. ; Wickenhauser, S. ;Vescan, L. ; Marso, M. ; Grabolla, T. ; Grimm M. ; Liith, H. ; "Selectively grown vertical Si MOS transistor with reduced overlap capacitances", Thin Solid Films, Volume 336, December 1998, pp. 306-308
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Kiaes, D.1
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4
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0033329311
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The vertical replacement-gate (vrg) mosfet: A 50-nm vertical mosfet with lithography-independent gate length
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Hergenrother, J. M. ; Monroe, D. ; Klemens, F. P. ; Komblit, A. ; Weber, G. R. ; Mansfield, W. M. ; Baker, M. R. ; Baumann, F. H. ; Bolan, K. J. ; Bower, J. E. ; Ciampa, N. A. ; Cirelli, R. A. ; Colonell, J. I. ; Eaglesham, D. J. ; Frackoviak, J. ; Gossmann, H. J. ; Green, M. L. ; Hill; "The Vertical Replacement-Gate (VRG) MOSFET: a 50-nm vertical MOSFET with lithography-independent gate length", IEDM 1999, pp. 75-78
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Hergenrother, J.M.1
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Baker, M.R.7
Baumann, F.H.8
Bolan, K.J.9
Bower, J.E.10
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Cirelli, R.A.12
Colonell, J.I.13
Eaglesham, D.J.14
Frackoviak, J.15
Gossmann, H.J.16
Green, M.L.17
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5
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0036923375
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Fully depleted surrounding gate transistor (sgt) for 70 nm dram and beyond
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Goebef, B. ; Lutzen, J. ; Manger, D. ; Moll, P. ; Mummler, K. ; Popp, M. ; Scheler, U. ; Schlosser, T. ; Seidi, H. ; Sesterhenn, M. ; Slesazeck, S. ; Tegen, S. ; "Fully Depleted Surrounding Gate Transistor (SGT) for 70 nm DRAM and Beyond", IEDM 2002, pp. 275-278
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Goebef, B.1
Lutzen, J.2
Manger, D.3
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Mummler, K.5
Popp, M.6
Scheler, U.7
Schlosser, T.8
Seidi, H.9
Sesterhenn, M.10
Slesazeck, S.11
Tegen, S.12
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6
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0033281273
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High performance fully and partially depleted poly-si surrounding gate transistors
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Cho, H. -J. ; Plummer, J. D. ; "High performance fully and partially depleted poly-Si surrounding gate transistors", 1999 Symposium on VLSI Technology Digest, pp. 31-32
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Cho, H.-J.1
Plummer, J.D.2
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7
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0029717332
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Vertical, fully-depleted, surrounding gate mosfets on sub-0. 1 μm thick silicon pillars
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C. P. Auth, J. D. Plummer, "Vertical, fully-depleted, surrounding gate MOSFETs on sub-0. 1 μm thick silicon pillars", Device Research Conference, 1996, pp. 108-109
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Auth, C.P.1
Plummer, J.D.2
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8
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0036927333
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15-nm-thick si channel wall vertical double-gate mosfet
-
Masahara, M. ; Matsukawa, T. ; Ishii, K. ; Yongxun Liu; Tanoue, H. ; Sakamoto, K. ; Sekigawa, T. ; Yamauchi, H. ; Kanemaru, S. ; Suzuki, E. ; "15-nm-Thick Si Channel Wall Vertical Double-Gate MOSFET", IEDM 2002, pp. 949-951
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IEDM
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Masahara, M.1
Matsukawa, T.2
Ishii, K.3
Liu, Y.4
Tanoue, H.5
Sakamoto, K.6
Sekigawa, T.7
Yamauchi, H.8
Kanemaru, S.9
Suzuki, E.10
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