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Volumn 336, Issue 1-2, 1998, Pages 306-308

Selectively grown vertical Si MOS transistor with reduced overlap capacitances

Author keywords

Low pressure chemical vapour deposition; Miller capacitance; MOS transistor; Selective epitaxial growth

Indexed keywords

CAPACITANCE; CHEMICAL VAPOR DEPOSITION; EPITAXIAL GROWTH; PHOTOLITHOGRAPHY; REACTIVE ION ETCHING; SEMICONDUCTING SILICON; SEMICONDUCTOR DEVICE MANUFACTURE; SILICA; THIN FILM TRANSISTORS; TRANSCONDUCTANCE;

EID: 0032318731     PISSN: 00406090     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0040-6090(98)01248-6     Document Type: Article
Times cited : (20)

References (7)
  • 1
    • 0346845578 scopus 로고
    • Process of the Future, Roadmap of the SIA
    • N.N. SIA, Process of the Future, Roadmap of the SIA, Solid-State Technol. (1995) 42.
    • (1995) Solid-State Technol. , pp. 42
    • Sia, N.N.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.