On the reliable performance of sequential adders for soft computing

Proceedings - IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems

Volumn , Issue , 2011, Pages 3-10

  Liang, Jinghang ^a   Han, Jie ^a   Lombardi, Fabrizio ^b  

^a UNIVERSITY OF ALBERTA   (Canada)

^b NORTHEASTERN UNIVERSITY   (United States)

Author keywords

Approximate logic; Error masking; Imprecise arithmetic; Mean error distance; Reliability; Sequential adders; Soft computing

Indexed keywords

ADDER DESIGN; APPROXIMATE LOGIC; BIOLOGICAL NETWORKS; ERROR MASKING; FULL ADDERS; GATE ERRORS; MEAN ERRORS; NANOMETRICS; OPERATIONAL PROFILE; PROBABILITY TRANSITION; RELIABILITY ASSESSMENTS; RELIABLE PERFORMANCE; STATIC POWER CONSUMPTION; TECHNICAL LITERATURE;

DEFECTS; FAULT TOLERANCE; NANOTECHNOLOGY; RELIABILITY; RELIABILITY ANALYSIS; SOFT COMPUTING;

ADDERS;

EID: 84855785059     PISSN: 15505774     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DFT.2011.54     Document Type: Conference Paper

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