Combined loop transformation and hierarchy allocation for data reuse optimization

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn , Issue , 2011, Pages 185-192

  Cong, Jason ^a   Zhang, Peng ^a   Zou, Yi ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

data reuse; High level synthesis; loop transformation; memory hierarchy optimization

Indexed keywords

ALLOCATION PROBLEMS; BUFFER SIZES; DATA LOCALITY; DATA REUSE; EXTERNAL MEMORY; HIGH LEVEL SYNTHESIS; LOOP TRANSFORMATION; MEMORY HIERARCHY; NON-LINEAR CONSTRAINTS; ON CHIP MEMORY; ON CHIPS; OPTIMAL RESULTS; OPTIMAL SOLUTIONS; OPTIMALITY; RUNTIMES; SOLUTION SPACE; TWO STEP METHOD;

BANDWIDTH; COMPUTER AIDED DESIGN; COMPUTER ARCHITECTURE; DATA FLOW ANALYSIS; MATHEMATICAL TRANSFORMATIONS; OPTIMIZATION;

METADATA;

EID: 84855778017     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2011.6105324     Document Type: Conference Paper

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