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Volumn , Issue , 2011, Pages 228-235

OpenPR: An open-source partial-reconfiguration toolkit for xilinx FPGAs

Author keywords

[No Author keywords available]

Indexed keywords

BASELINE DESIGN; OPEN SOURCES; OPEN-SOURCE; PARTIAL RECONFIGURATION;

EID: 83455253949     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IPDPS.2011.146     Document Type: Conference Paper
Times cited : (46)

References (17)
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    • M. French, E. Anderson, and D.-I. Kang, "Autonomous System on a Chip Adaptation through Partial Runtime Reconfiguration," in 2008 16th International Symposium on Field-Programmable Custom Computing Machines. IEEE, April 2008, pp. 77-86. [Online]. Available: http://ieeexplore.ieee.org/lpdocs/ epic03/wrapper.htm?arnumber=4724891
    • (2008) 2008 16th International Symposium on Field-programmable Custom Computing Machines , pp. 77-86
    • French, M.1    Anderson, E.2    Kang, D.-I.3
  • 3
    • 74349113586 scopus 로고    scopus 로고
    • Exploiting partially reconfigurable FPGAs for situation-based reconfiguration in wireless sensor networks
    • IEEE [Online]
    • R. Garcia, A. Gordon-Ross, and A. D. George, "Exploiting Partially Reconfigurable FPGAs for Situation-Based Reconfiguration in Wireless Sensor Networks," in 2009 17th IEEE Symposium on Field Programmable Custom Computing Machines. IEEE, 2009, pp. 243-246. [Online]. Available: http://ieeexplore.ieee.org/lpdocs/epic03/wrapper.htm?arnumber=5290914
    • (2009) 2009 17th IEEE Symposium on Field Programmable Custom Computing Machines , pp. 243-246
    • Garcia, R.1    Gordon-Ross, A.2    George, A.D.3
  • 5
    • 51849141354 scopus 로고    scopus 로고
    • SeReCon: A secure dynamic partial reconfiguration controller
    • ISVLSI '08. IEEE Computer Society Annual, April
    • K. Kepa, F. Morgan, K. Kościuszkiewicz, and T. Surmacz, "SeReCon: a Secure Dynamic Partial Reconfiguration Controller," in Symposium on VLSI, 2008. ISVLSI '08. IEEE Computer Society Annual, April 2008, pp. 292-297.
    • (2008) Symposium on VLSI, 2008 , pp. 292-297
    • Kepa, K.1    Morgan, F.2    Kościuszkiewicz, K.3    Surmacz, T.4
  • 7
    • 84963935808 scopus 로고    scopus 로고
    • JBits" design abstractions
    • [Online]
    • C. Patterson and S. A. Guccione, "JBits" Design Abstractions," FCCM, 2001. [Online]. Available: http://portal.acm.org/ citation.cfm?id=1058426.1058888
    • (2001) FCCM
    • Patterson, C.1    Guccione, S.A.2
  • 8
    • 84855232062 scopus 로고    scopus 로고
    • [Online]
    • T. Gingold, "GHDL," 2010. [Online]. Available: http://ghdl.free.fr/
    • (2010)
    • Gingold, T.1
  • 10
    • 84855227465 scopus 로고    scopus 로고
    • [Online]
    • J. Cong, "RASP," 2004. [Online]. Available: http://cadlab.cs.ucla.edu/software-release/rasp/htdocs/
    • (2004) RASP
    • Cong, J.1
  • 11
    • 78649389846 scopus 로고    scopus 로고
    • [Online]
    • "VPR and T-VPack 5.0.2," 2009. [Online]. Available: http://www.eecg.utoronto.ca/vpr/
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  • 15
    • 34548059402 scopus 로고    scopus 로고
    • Invited paper: Enhanced architectures, design methodologies and CAD tools for dynamic reconfiguration of xilinx FPGAs
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    • P. Lysaght, B. Blodget, J. Mason, J. Young, and B. Bridgford, "Invited Paper: Enhanced Architectures, Design Methodologies and CAD Tools for Dynamic Reconfiguration of Xilinx FPGAs," 2006 International Conference on Field Programmable Logic and Applications, pp. 1-6, 2006. [Online]. Available: http://ieeexplore.ieee.org/lpdocs/epic03/wrapper.htm?arnumber=4100950
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    • Lysaght, P.1    Blodget, B.2    Mason, J.3    Young, J.4    Bridgford, B.5
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.