Odin II - An open-source Verilog HDL synthesis tool for CAD research

Proceedings - IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2010

Volumn , Issue , 2010, Pages 149-156

  Jamieson, Peter ^a   Kent, Kenneth B ^b   Gharibian, Farnaz ^c   Shannon, Lesley ^c  

^a MIAMI UNIVERSITY   (United States)

^b UNIVERSITY OF NEW BRUNSWICK   (Canada)

^c SIMON FRASER UNIVERSITY   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

ARCHITECTURAL DESCRIPTIONS; CAD FLOW; DESIGN FEATURES; FPGAS AND ASICS; NETLIST; OPEN SOURCES; OPEN-SOURCE; SYNTHESIS TOOL; VERILOG HARDWARE DESCRIPTION LANGUAGES; VERILOG HDL;

COMPUTER AIDED DESIGN; COMPUTERS; RESEARCH;

COMPUTER HARDWARE DESCRIPTION LANGUAGES;

EID: 77954251410     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FCCM.2010.31     Document Type: Conference Paper

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