Hardware synchronization for embedded multi-core processors

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2011, Pages 2557-2560

  Stoif, Christian ^a   Schoeberl, Martin ^b   Liccardi, Benito ^c   Haase, Jan ^a  

^a VIENNA UNIVERSITY OF TECHNOLOGY   (Austria)

^b TECHNICAL UNIVERSITY OF DENMARK   (Denmark)

^c BMW GROUP   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

DUAL-CORE; HARDWARE SOLUTIONS; INHERENT PARALLELISM; MULTI-CORE PROCESSOR; POWERPC PROCESSORS; PROCESSOR CORES; SHARED MEMORIES; SYNCHRONIZATION PRIMITIVE;

COMPUTER ARCHITECTURE; HARDWARE; SYNCHRONIZATION;

EMBEDDED SYSTEMS;

EID: 79960889069     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2011.5938126     Document Type: Conference Paper

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