Verifying SystemC: A software model checking approach

Formal Methods in Computer Aided Design, FMCAD 2010

Volumn , Issue , 2010, Pages 51-59

  Cimatti, Alessandro ^a   Micheli, Andrea ^a   Narasamdya, Iman ^a   Roveri, Marco ^a  

^a ITC IRST   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

C FUNCTIONS; C PROGRAMS; COOPERATIVE SCHEDULING; DE FACTO STANDARD; DIRECT EXECUTION; EFFICIENT SIMULATION; EXPERIMENTAL EVALUATION; FINITE-STATE MODELS; FORMAL VERIFICATIONS; INTRINSIC STRUCTURES; MODEL-CHECKING TECHNIQUES; MULTITHREADED SOFTWARES; PREVENT ERROR PROPAGATION; SEQUENTIAL PROGRAMS; SEQUENTIAL SOFTWARES; SOFTWARE MODEL CHECKERS; SOFTWARE MODEL CHECKING; SYSTEMC; SYSTEMC DESIGN; TWO DIRECTIONS;

ABSTRACTING; C (PROGRAMMING LANGUAGE); COMPUTER AIDED DESIGN; EMBEDDED SOFTWARE; EMBEDDED SYSTEMS; FORMAL METHODS; MODEL CHECKING; PROGRAM TRANSLATORS; SCHEDULING; SEMANTICS; STANDARDIZATION;

LOGIC DESIGN;

EID: 79958718330     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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