Formal verification of SystemC by automatic hardware/software partitioning

Proceedings - Third ACM and IEEE International Conference on Formal Methods and Models for Co-Design, MEMOCODE'05

Volumn 2005, Issue , 2005, Pages 101-110

  Kroening, Daniel ^a   Sharygina, Natasha ^b  

^a ETH ZURICH   (Switzerland)

^b CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ASYNCHRONOUS (SOFTWARE) PARTS; SOFTWARE PARTITIONING; SYNCHRONOUS (HARDWARE); SYSTEM-LEVEL LANGUAGES;

AUTOMATIC PROGRAMMING; COMPUTER AIDED SOFTWARE ENGINEERING; COMPUTER HARDWARE; FORMAL LOGIC; GENERAL PURPOSE COMPUTERS;

HIGH LEVEL LANGUAGES;

EID: 33745134408     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MEMCOD.2005.1487900     Document Type: Conference Paper

References (38)

1. http://www.specc.org.
2. T. S. Anantharaman, E. M. Clarke, M. J. Foster, and B. Mishra. Compiling path expressions into VLSI circuits. In Proceedings of POPL, pages 191-204, 1985.
3. T. Ball and S. Rajamani. Boolean programs: A model and process for software analysis. Technical Report 2000-14, Microsoft Research, February 2000.
4. A. Biere, A. Cimatti, E. M. Clarke, M. Fujita, and Y. Zhu. Symbolic model checking using SAT procedures instead of BDDs. In Design Automation Conference (DAC'99), 1999.
5. A. Biere, A. Cimatti, E. M. Clarke, and Y. Yhu. Symbolic model checking without BDDs. In TACAS, pages 193-207, 1999.
6. S. Chaki, E. Clarke, A. Groce, S. Jha, and H. Veith. Modular verification of software components in C. In ICSE, pages 385-395, 2003.
7. E. Clarke, S. Chaki, N. Sharygina, J. Ouaknine, and N. Sinha. State/event-based software model checking. In Proceedings of the International Conf. on Integrated Formal Methods, LNCS 2999, 2004.
8. E. Clarke, O. Grumberg, S. Jha, Y. Lu, and V. H. Counterexample-guided abstraction refinement. In CAV, pages 154-169. Springer-Verlag, 2000.
9. E. Clarke, O. Grumberg, and D. Long. Model checking and abstraction. In POPL, 1992.
10. E. Clarke, O. Grumberg, and D. Peled. Model Checking. MIT Press, 1999.
11. E. Clarke, O. Grumberg, M. Talupur, and D. Wang. High level verification of control intensive systems using predicate abstraction. In First ACM and IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE03). IEEE, 2003.
12. E. Clarke, H. Jain, and D. Kroening. Predicate Abstraction and Refinement Techniques for Verifying Verilog. Technical Report CMU-CS-04-139, Carnegie Mellon University, School of Computer Science, 2004.
13. E. Clarke, D. Kroening, N. Sharygina, and K. Yorav. Predicate abstraction of ANSI-C programs using SAT. Formal Methods in System, Design, 25:105-127, September-November 2004.
14. E. Clarke, D. Kroening, N. Sharygina, and K. Yorav. SATABS: SAT-based predicated abstraction for ANSIC. In Proceedings of the 11th International Conf. on Tools and Algorithms for Construction and Analysis of Systems (TACAS), 2005.
15. E. M. Clarke and E. A. Emerson. Synthesis of synchronization skeletons for branching time temporal logic. In Logic of Programs: Workshop, volume 131 of LNCS. Springer-Verlag, 1981.
16. M. Colón and T. Uribe. Generating finite-state abstractions of reactive systems using decision procedures. In CAV, volume 1427 of LNCS, pages 293-304. Springer, 1998.
17. B. Cook, D. Kroening, and N. Sharygina. Accurate theorem proving for program verification. Technical Report 473, ETH Zurich, January 2005.
18. D. W. Currie, A. J. Hu, and S. Rajan. Automatic formal verification of DSP software. In Proceedings of DAC 2000, pages 130-135. ACM Press, 2000.
19. R. Drechsler and D. Große. Reachability analysis for formal verification of SystemC. In Euromicro Symposium on Digital System Design (DSD'02), page 337, September 2002.
20. S. Graf and H. Saïdi. Construction of abstract state graphs with PVS. In CAV, volume 1254 of LNCS, pages 72-83. Springer, 1997.
21. T. A. Henzinger, R. Jhala, R. Majumdar, and G. Sutre. Lazy abstraction. In Symposium on Principles of Programming Languages, pages 58-70, 2002.
22. J. Ivers and N. Sharygina. Overview of ComFoRT, a model checking reasoning framework. Technical Report CMU/SEI-2004-TN-018, CMU, April 2004.
23. H. Jain, E. Clarke, and D. Kroening. Verification of SpecC and Verilog using predicate abstraction. In Proceedings of MEMOCODE 2004, pages 7-16. IEEE, 2004.
24. H. Jain, D. Kroening, N. Sharygina, and E. Clarke. Word level predicate abstraction and refinement for verifying RTL Verilog. In Proceedings of DAC 2005, 2005. To appear.
25. E. Kindler and T. Vesper. ESTL: A temporal logic for events and states. Lecture Notes in Computer Science, 1420:365-383, 1998.
26. D. Kroening and E. Clarke. Checking consistency of C and Verilog using predicate abstraction and induction. In Proceedings of ICCAD, pages 66-72. IEEE, November 2004.
27. D. Kroening, E. Clarke, and K. Yorav. Behavioral consistency of C and Verilog programs using bounded model checking. In Proceedings of DAC 2003, pages 368-371. ACM Press, 2003.
28. D. Kroening and O. Strichman. Efficient computation of recurrence diameters. In L. Zuck, P. Attie, A. Cortesi, and S. Mukhopadhyay, editors, 4th International Conference on Verification, Model Checking, and Abstract Interpretation, volume 2575 of Lecture Notes in Computer Science, pages 298-309. Springer Verlag, January 2003.
29. D. Ku and G. DeMicheli. HardwareC - a language for hardware design (version 2.0). Technical Report CSL-TR-90-419, Stanford University, 1990.
30. R. Kurshan. Computer-Aided Verification of Coordinating Processes. Princeton University Press, Princeton, 1995.
31. K. Man. Enhancing formal methods for SystemC designs. In PROGRESS 2003 Embedded Systems Symposium, 2003.
32. M. W. Moskewicz, C. F. Madigan, Y. Zhao, L. Zhang, and S. Malik. Chaff: Engineering an efficient SAT solver. In Proceedings of the 38th Design Automation Conference (DAC'01), pages 530-535, June 2001.
33. R. D. Nicola and F. Vaandrager. Three logics for branching bisimulation. Journal of the ACM (JACM), 42(2):458-487, 1995.
34. I. Page. Constructing Hardware-Soft ware Systems from a Single Description. Journal of VLSI Signal Processing, 12(1):87-107, 1996.
35. A. W. Roscoe. The Theory and Practice of Concurrency. Prentice-Hall International, London, 1997.
36. T. Sakunkonchak and M. Fujita. Verification of event-based synchronization of SpecC description using difference decision diagrams. In D. Peled and M. Y. Vardi, editors, Formal Techniques for Networked and Distributed Systems (FORTE 2002), volume 2529 of Lecture Notes in Computer Science. Springer, 2002.
37. http://www.systemc.org.
38. C. Schulz-Key, M. Winterholer, T. Schweizer, T. Kuhn, and W. Rosenstiel. Object-oriented modeling and synthesis of SystemC specifications. In Proceedings of the Asia South Pacific Design Automation Conference (ASPDAC'04), pages 238-243, 2004.