Synthesis of quantum circuits for linear nearest neighbor architectures

Quantum Information Processing

Volumn 10, Issue 3, 2011, Pages 355-377

  Saeedi, Mehdi ^a   Wille, Robert ^b   Drechsler, Rolf ^b  

^a AMIRKABIR UNIVERSITY OF TECHNOLOGY   (Iran)

^b UNIVERSITY OF BREMEN   (Germany)

Author keywords

Logic synthesis; Nearest neighbor architectures; Quantum circuits; Template matching

Indexed keywords

CIRCUIT DESIGNERS; EXACT SYNTHESIS; INTEGRATED SYNTHESIS; INTERACTION DISTANCES; LOGIC SYNTHESIS; MATCHING OPTIMIZATION; NEAREST NEIGHBORS; NEAREST-NEIGHBOR INTERACTIONS; QUANTUM ARCHITECTURE; QUANTUM CIRCUIT; QUANTUM COSTS; QUANTUM TECHNOLOGIES;

LOGIC CIRCUITS; TEMPLATE MATCHING;

ARCHITECTURE;

EID: 79956151538     PISSN: 15700755     EISSN: None     Source Type: Journal    
DOI: 10.1007/s11128-010-0201-2     Document Type: Article

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