Exploring NoC-based MPSoC design space with power estimation models

IEEE Design and Test of Computers

Volumn 28, Issue 2, 2011, Pages 16-28

  Ost, Luciano ^a   Indrusiak, Leandro Soares ^b   Guindani, Guilherme Montez ^c   Moraes, Fernando Gehm ^c   Määttä, Sanna ^d  

^a LIRMM   (France)

^b UNIVERSITY OF YORK   (United Kingdom)

^c PONTIFICAL CATHOLIC UNIVERSITY OF RIO GRANDE DO SUL   (Brazil)

^d TAMPERE UNIVERSITY OF TECHNOLOGY   (Finland)

Author keywords

actor orientation; design and test; MPSoC; NoC; NoC power estimation model; SoC

Indexed keywords

ACTOR ORIENTATION; DESIGN AND TEST; MPSOC; NOC; NOC POWER ESTIMATION MODEL; SOC;

COMPUTER SIMULATION; DESIGN; MULTIPROCESSING SYSTEMS; PROGRAMMABLE LOGIC CONTROLLERS; VLSI CIRCUITS;

PARAMETER ESTIMATION;

EID: 79953659927     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/MDT.2010.116     Document Type: Article

References (9)

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