Analog operation and harmonic distortion temperature dependence of nMOS junctionless transistors

ECS Transactions

Volumn 31, Issue 1, 2010, Pages 13-20

  Doria, R T ^a   Pavanello, M A ^b   Lee, C W ^c   Ferain, I ^c   Dehdashti Akhavan, N ^c   Yan, R ^c   Razavi, P ^c   Yu, R ^c   Kranti, A ^c   Colinge, J P ^c  

^a UNIVERSITY OF SÃO PAULO   (Brazil)

^b Department of Electrical Engineering   (Brazil)

^c UNIVERSITY COLLEGE CORK   (Ireland)

Author keywords

[No Author keywords available]

Indexed keywords

DRAIN CURRENT; HARMONIC DISTORTION; MICROELECTRONICS; TRANSISTORS;

ANALOG PARAMETERS; DISTORTION TEMPERATURES; INTRINSIC VOLTAGE GAINS; JUNCTIONLESS TRANSISTORS; LOWER TEMPERATURES; NOVEL ARCHITECTURE; THIRD ORDER HARMONICS; TRI-GATE TRANSISTORS;

TEMPERATURE DISTRIBUTION;

EID: 79952410656     PISSN: 19385862     EISSN: 19386737     Source Type: Conference Proceeding    
DOI: 10.1149/1.3474137     Document Type: Conference Paper

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