Performance estimation of junctionless multigate transistors

Solid-State Electronics

Volumn 54, Issue 2, 2010, Pages 97-103

  Lee, Chi Woo ^a   Ferain, Isabelle ^a   Afzalian, Aryan ^a   Yan, Ran ^a   Akhavan, Nima Dehdashti ^a   Razavi, Pedram ^a   Colinge, Jean Pierre ^a  

^a UNIVERSITY COLLEGE CORK   (Ireland)

Author keywords

Multiple gate MOSFET; Silicon on Insulator

Indexed keywords

DECA-NANOMETER; ELECTRICAL CHARACTERISTIC; ELECTRICAL PROPERTY; FABRICATION PROCESS; MOS-FET; MULTIGATE TRANSISTORS; MULTIPLE-GATE MOSFET; P-N JUNCTION; PERFORMANCE ESTIMATION; SILICON ON INSULATOR; SIMULATION RESULT; SOURCE AND DRAINS;

ELECTRIC PROPERTIES; FIELD EFFECT TRANSISTORS; MICROSENSORS; MOSFET DEVICES;

SEMICONDUCTING SILICON COMPOUNDS;

EID: 76349089165     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sse.2009.12.003     Document Type: Article

References (10)

1. Colinge J.P. Multi-gate SOI MOSFETs. Solid-State Electron 48 (2004) 897-905
2. Masahara M., Endo K., Liu Y., Matsukawa T., O'uchi S., Ishii K., et al. Demonstration and analysis of accumulation-mode double-gate metal-oxide-semiconductor field-effect transistor. Jpn J Appl Phys 45 4 (2006) 3079-3083
3. Rauly E, Iñiguez B, Flandre D, Raynaud C. Investigation of single and double gate SOI MOSFETs in accumulation mode for enhanced performances and reduced technological drawbacks. In: Proc ESSDERC; 2000. p. 540.
4. Park J.T., Colinge J.P., and Diaz C.H. Pi-Gate SOI MOSFET. IEEE Electron Dev Lett 22 8 (2001) 405-406
5. http://www.silvaco.com.
6. Fossum J.G., Yang J.-W., and Trivedi V.P. Suppression of corner effects in triple-gate MOSFETs. IEEE Electron Dev Lett 24 12 (2003) 745-747
7. Lee C.-W., Lederer D., Afzalian A., Yan R., Dehdashti N., Xiong W., et al. Comparison of contact resistance between accumulation-mode and inversion-mode multigate FETs. Solid-State Electron 52 11 (2008) 1815
8. Yan R., Lynch D., Cayron T., Lederer D., Afzalian A., Lee C.-W., et al. Sensitivity of trigate MOSFETs to random dopant induced threshold voltage fluctuations. Solid-State Electron 52 12 (2008) 1872-1876
9. Park JW, Xiong W, Colinge JP. Accumulation-mode pi-gate MOSFET. In: Proc IEEE Int SOI Conf; 2003. p. 65-6.
10. Lee C.-W., Yun S.-R.-N., Yu C.-G., Park J.-T., and Colinge J.P. Device design guidelines for nano-scale MuGFETs. Solid-State Electron 51 (2007) 505-510