Two op-amps third-order sigma-delta modulator with 61-dB SNDR, 6-MHz bandwidth and 6-mW power consumption

Analog Integrated Circuits and Signal Processing

Volumn 66, Issue 3, 2011, Pages 381-388

  Bonizzoni, Edoardo ^a   Perez, Aldo Peña ^a   Maloberti, Franco ^a   Garcia Andrade, Miguel A ^b  

^a UNIVERSITY OF PAVIA   (Italy)

^b UNIVERSIDAD AUTÓNOMA DE BAJA CALIFORNIA   (Mexico)

Author keywords

Low power; Sigma delta modulator

Indexed keywords

ANALOG CMOS; BEHAVIORAL STUDIES; EXPERIMENTAL MEASUREMENTS; LOW POWER; POWER CONSUMPTION; POWER REDUCTIONS; QUANTIZERS; SIGMA DELTA MODULATOR; SIGNAL BAND; THIRD ORDER; TOPOLOGICAL MODIFICATION;

BANDPASS AMPLIFIERS; BEHAVIORAL RESEARCH; CMOS INTEGRATED CIRCUITS; DELTA MODULATION;

MODULATORS;

EID: 79952183565     PISSN: 09251030     EISSN: 15731979     Source Type: Journal    
DOI: 10.1007/s10470-010-9538-9     Document Type: Article

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