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Volumn 51, Issue , 2008, Pages 314-316

A 242mW 10mm2 1080p H.264/AVC high-profile encoder chip

Author keywords

[No Author keywords available]

Indexed keywords

MOTION PICTURE EXPERTS GROUP STANDARDS;

EID: 49549095801     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2008.4523183     Document Type: Conference Paper
Times cited : (64)

References (5)
  • 1
    • 28144447102 scopus 로고    scopus 로고
    • A 1.3TOPS H.264/AVC Single-Chip Encoder for HDTV applications
    • Feb
    • Y. W. Huang, et al., "A 1.3TOPS H.264/AVC Single-Chip Encoder for HDTV applications," ISSCC Dig. Tech.Papers, pp. 128-588, Feb. 2003.
    • (2003) ISSCC Dig. Tech.Papers , pp. 128-588
    • Huang, Y.W.1
  • 2
    • 34548833276 scopus 로고    scopus 로고
    • A 7mW to 183mW Dynamic Quality-Scalable H.264 Video Encoder Chip
    • Feb
    • H. C. Chang, et al., "A 7mW to 183mW Dynamic Quality-Scalable H.264 Video Encoder Chip," ISSCC Dig. Tech.Papers, pp. 280-281, Feb. 2007.
    • (2007) ISSCC Dig. Tech.Papers , pp. 280-281
    • Chang, H.C.1
  • 3
    • 39749116345 scopus 로고    scopus 로고
    • 2.8 to 67.2mW Low-Power and Power-Aware H.264 Encoder for Mobile Applications
    • June
    • T. C. Chen, et al., "2.8 to 67.2mW Low-Power and Power-Aware H.264 Encoder for Mobile Applications," Dig. Symp. on VLSI Circuits, pp. 222-223, June 2007.
    • (2007) Dig. Symp. on VLSI Circuits , pp. 222-223
    • Chen, T.C.1
  • 4
    • 34547548628 scopus 로고    scopus 로고
    • PMRME: A Parallel Multi-Resolution Motion Estimation Algorithm and Architecture for HDTV Sized H.264 Video Coding
    • Apr
    • C. C. Lin, Y. K. Lin, and T. S. Chang, "PMRME: A Parallel Multi-Resolution Motion Estimation Algorithm and Architecture for HDTV Sized H.264 Video Coding," Proc. ICASSP, vol. 2, pp. 385-388, Apr. 2007.
    • (2007) Proc. ICASSP , vol.2 , pp. 385-388
    • Lin, C.C.1    Lin, Y.K.2    Chang, T.S.3
  • 5
    • 33746358201 scopus 로고    scopus 로고
    • Analysis and Architecture Design of an HDTV 720p 30 Frames/s H.264/AVC Encoder
    • June
    • T C. Chen, et al., "Analysis and Architecture Design of an HDTV 720p 30 Frames/s H.264/AVC Encoder," IEEE Trans. Circuits Syst. Video Technol., vol. 16, pp. 673-688, June 2006.
    • (2006) IEEE Trans. Circuits Syst. Video Technol , vol.16 , pp. 673-688
    • Chen, T.C.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.