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Volumn , Issue , 2010, Pages

Novel 3-dimensional Dual Control-gate with Surrounding Floating-gate (DC-SF) NAND flash cell for 1Tb file storage application

Author keywords

[No Author keywords available]

Indexed keywords

3-DIMENSIONAL; CELL OPERATION; CONTROL GATES; COUPLING RATIOS; DUAL CONTROL; FILE STORAGE; FLOATING-GATES; LOW VOLTAGES; MULTI-BITS; NAND FLASH;

EID: 79951846898     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2010.5703447     Document Type: Conference Paper
Times cited : (65)

References (12)
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  • 2
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    • Aritome, S.1
  • 3
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  • 4
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    • Optimal Integration and Characteristics of Vertical Array Devices for Ultra-High Density, Bit-Cost Scalable Flash Memory
    • Yoshiaki Fukuzumi, et al., "Optimal Integration and Characteristics of Vertical Array Devices for Ultra-High Density, Bit-Cost Scalable Flash Memory", IEEE IEDM Technical Digest, pp. 449-452, 2007.
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  • 5
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    • Katsumata, R.1
  • 7
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  • 8
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    • Optimal Device Structure for Pipe-shaped BiCS Flash Memory for Ultra High Density Storage Device with Excellent Performance and Reliability
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  • 9
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    • WonJoo Kim, et al., "Multi-Layered Vertical Gate NAND Flash Overcoming Stacking Limit for Terabit Density Storage", VLSI Symposium Tech. Dig., 2009, pp. 188-189.
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  • 10
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.