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Volumn , Issue , 2010, Pages
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The 3-dimensional vertical FG NAND flash memory cell arrays with the novel electrical S/D technique using the Extended Sidewall Control Gate (ESCG)
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Author keywords
[No Author keywords available]
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Indexed keywords
3-DIMENSIONAL;
CELL ARRAY;
CHARGE TRAP;
CONTROL GATES;
COUPLING RATIOS;
ENHANCEMENT MODES;
FLASH CELL;
FLASH MEMORY CELL;
FLOATING GATES;
HIGH RELIABILITY;
HIGH-SPEED;
HIGH-SPEED PROGRAMMING;
NAND FLASH;
NAND FLASH MEMORY;
NOVEL STRUCTURES;
READ CURRENT;
TERABIT;
CELLS;
CYTOLOGY;
NAND CIRCUITS;
SEMICONDUCTOR STORAGE;
THREE DIMENSIONAL;
FLASH MEMORY;
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EID: 77957903010
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/IMW.2010.5488392 Document Type: Conference Paper |
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Times cited : (15)
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References (6)
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