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Volumn 58, Issue 2, 2011, Pages 288-295

A charge trap folded nand flash memory device with band-gap-engineered storage node

Author keywords

Band gap engineering; charge trap; double gate; flash memory; folded nand (F nand); paired cell interference (PCI); sidewall spacer patterning

Indexed keywords

BAND GAP ENGINEERING; CHARGE TRAP; DOUBLE GATE; FOLDED NAND (F NAND); PAIRED CELL INTERFERENCE (PCI); SIDEWALL SPACER;

EID: 79151483114     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2010.2090420     Document Type: Article
Times cited : (8)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.