Impact of quantum confinement on short-channel effects for ultrathin-body germanium-on-insulator MOSFETs

IEEE Electron Device Letters

Volumn 32, Issue 1, 2011, Pages 18-20

  Wu, Yu Sheng ^a   Hsieh, Hsin Yuan ^a   Hu, Vita Pi Ho ^a   Su, Pin ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

Germanium on insulator (GeOI); quantum confinement (QC); threshold voltage roll off

Indexed keywords

ANALYTICAL SOLUTIONS; BURIED OXIDES; CHANNEL THICKNESS; CRITICAL VALUE; GERMANIUM-ON-INSULATOR; MOSFETS; SCHRDINGER EQUATIONS; SHORT-CHANNEL EFFECT; SI-ON-INSULATOR; TCAD SIMULATION; THRESHOLD VOLTAGE ROLL-OFF; ULTRA-THIN-BODY;

FLIGHT DYNAMICS; GERMANIUM; MOSFET DEVICES; QUANTUM CONFINEMENT; THRESHOLD VOLTAGE;

SEMICONDUCTING SILICON COMPOUNDS;

EID: 78650863623     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2010.2089425     Document Type: Conference Paper

References (14)

1. E. Pop, C. O. Chui, S. Sinha, R. Dutton, and K. Goodson, "Electrothermal comparison and performance optimization of thin-body SOI and GOI MOSFETs," in IEDM Tech. Dig., 2004, pp. 411-414.
2. S. W. Bedell, A. Majumdar, J. A. Ott, J. Arnold, K. Fogel, S. J. Koester, and D. K. Sadana, "Mobility scaling in short-channel length strained Ge-on-insulator P-MOSFETs," IEEE Electron Device Lett., vol. 29, no. 7, pp. 811-813, Jul. 2008.
3. A. Wettstein, A. Schenk, and W. Fichtner, "Quantum device simulation with the density-gradient model on unstructured grids," IEEE Trans. Electron Devices, vol. 48, no. 2, pp. 279-284, Feb. 2001.
4. Y. Omura, H. Konish, and S. Sato, "Quantum-mechanical suppression and enhancement of SCEs in ultrathin SOI MOSFETs," IEEE Trans. Electron Devices, vol. 53, no. 4, pp. 677-684, Apr. 2006.
5. V. P. Trivedi and J. G. Fossum, "Quantum-mechanical effects on the threshold voltage of undoped double-gate MOSFETs," IEEE Electron Device Lett., vol. 26, no. 8, pp. 579-582, Aug. 2005.
6. Y.-S. Wu and P. Su, "Analytical quantum-confinement model for short-channel gate-all-around MOSFETs under subthreshold region," IEEE Trans. Electron Devices, vol. 56, no. 11, pp. 2720-2725, Nov. 2009.
7. V. P.-H. Hu, Y.-S. Wu, and P. Su, "Investigation of electrostatic integrity for ultra-thin-body GeOI MOSFET using analytical solution of Poisson's equation," Semicond. Sci. Technol., vol. 24, no. 4, p. 045 017, Apr. 2009.
8. ATLAS User's Manual, SILVACO, Santa Clara, CA, 2008.
9. V. P. Trivedi, J. G. Fossum, and W. Zhang, "Threshold voltage and bulk inversion effects in nonclassical CMOS devices with undoped ultra-thin bodies," Solid State Electron., vol. 51, no. 1, pp. 170-178, Jan. 2007.
10. C.-T. Lee and K. K. Young, "Submicrometer near-intrinsic thin-film SOI complementary MOSFETs," IEEE Trans. Electron Devices, vol. 36, no. 11, pp. 2537-2547, Nov. 1989.
11. F. Stern, "Self-consistent results for n-type Si inversion layers," Phys. Rev. B, Condens. Matter, vol. 5, no. 12, pp. 4891-4899, Jun. 1972.
12. Y. Taur and T. H. Ning, Fundamentals of Modern VLSI Devices. Cambridge, U.K.: Cambridge Univ. Press, 1998.
13. E. Batail, S. Monfray, A. Pouydebasque, G. Ghibaudo, and T. Skotnicki, "Impact of scaling on electrostatics of germanium-channel MOSFET-Analytical study," in Proc. Silicon Nanoelectron. Workshop, 2008, pp. 1-2.
14. E. Batail, S. Monfray, D. Rideau, M. Szczap, N. Loubet, T. Skotnicki, C. Tabone, J. Hartmann, S. Borel, G. Rabille, J. Damlencourt, B. Vincent, B. Previtali, and L. Clavelier, "Germanium-on-nothing (GeON): An innovative technology for ultrathin Ge film integration," in Proc. 37th ESSDERC, Piscataway, NJ, 2007, pp. 450-453.