Electro-thermal comparison and performance optimization of thin-body SOI and GOI MOSFETs

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2004, Pages 411-414

  Pop, Eric ^a   Chui, Chi On ^a   Sinha, Sanjiv ^b   Dutton, Robert ^a   Goodson, Kenneth ^b  

^a Bldg 500 ^*  (United States)

^b Stanford University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRO-THERMAL COMPARISON; PERFORMANCE OPTIMIZATION; SATURATION CURRENTS; SELF-HEATING TRENDS; DEVICE TEMPERATURE; FULLY DEPLETED SOI; INTRINSIC GATE DELAY; MOSFETS; PERFORMANCE OPTIMIZATIONS; SELF CONSISTENT MODELING; TEMPERATURE SATURATION; THIN BODY;

CAPACITANCE; COMPUTER SIMULATION; ELECTRIC CURRENTS; ELECTRIC POTENTIAL; ELECTRON MOBILITY; ELECTROSTATICS; MATHEMATICAL MODELS; MOSFET DEVICES; OPTIMIZATION; THERMAL CONDUCTIVITY; THIN FILMS; SILICON ON INSULATOR TECHNOLOGY;

SILICON ON INSULATOR TECHNOLOGY; CAPACITANCE;

EID: 21644480747     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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