Multistage interconnection network for MPSoC: Performances study and prototyping on FPGA

Proceedings - 2008 3rd International Design and Test Workshop, IDT 2008

Volumn , Issue , 2008, Pages 11-16

  Neji, B ^a   Aydi, Y ^a   Ben atitallah, R ^b   Meftaly, S ^b   Abid, M ^a   Dykeyser, J L ^b  

^a UNIVERSITY OF SFAX   (Tunisia)

^b UNIV LILLE   (France)

Author keywords

FPGA; MIN; MPSoC; NoC

Indexed keywords

CROSSBAR NETWORKS; ENERGY CONSUMPTION; FPGA; HARDWARE AND SOFTWARES; MIN; MPSOC; MULTI-STAGE INTERCONNECTION NETWORKS; MULTIPROCESSOR SYSTEM ON CHIPS; NOC; PROTOTYPING;

COMPUTER ARCHITECTURE; ELECTRIC NETWORK TOPOLOGY; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); PARALLEL ARCHITECTURES; SIGNAL PROCESSING; ULTRASONIC TRANSDUCERS;

INTERCONNECTION NETWORKS;

EID: 78650423486     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IDT.2008.4802456     Document Type: Conference Paper

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