Formal specification of delta MINs for MPSOC in the ACL2 logic

Proceedings - 2008 Forum on Specification, Verification and Design Languages, FDL'08

Volumn , Issue , 2008, Pages 253-254

  Elleuch, Maïssa ^a   Aydi, Yassine ^a   Abid, Mohamed ^a  

^a UNIVERSITY OF SFAX   (Tunisia)

Author keywords

[No Author keywords available]

Indexed keywords

FORMAL SPECIFICATION; GENERIC MODELS; INTERCONNECTION ARCHITECTURE; MULTI PROCESSOR SYSTEMS; MULTISTAGE INTERCONNECTION NETWORK; NETWORKS ON CHIPS; ON CHIP COMMUNICATION; ON CHIPS; PERFORMANCE CONSTRAINTS;

SPECIFICATIONS;

INTERCONNECTION NETWORKS;

EID: 67650434506     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FDL.2008.4641461     Document Type: Conference Paper

References (8)

1. W.O. Cesario, "Multi-processor SoC platforms: a component-based design approach", IEEE Design and Test; v.19 n.6, IEEE Computer Society Press, CA, 2002, pp. 52-63.
2. S. Duquennoy, "MpNOC Design: modeling and simulation", In 15th IP based SOC Design Conference (IP - SoC 2006), 2006.
3. C. Stunkel, "The SP2 High-Performance Switch", IBM Systems Journal; v.34 n.2, IBM Corp., Riverton, 1995, pp. 185-204.
4. R. Y. Awdeh, "Survey of ATM switch architectures". Computer Networks and ISDN Systems; v.27 n.12, Elsevier Science Publishers B. V, The Netherlands, 1995, pp. 1567-1613.
5. Y. Aydi, "Dynamicity Analysis of Delta MINs for MPSOC Architectures", STA'07, 2007.
6. Y. Aydi, "Design and Performance Evaluation of a Reconfigurable Delta MIN for MPSOC", ICM '07, 2007.
7. J. Schmaltz, "Towards a Formal Theory of Communication Architecture in the ACL2 Logic", Proc. of ACL2 '06, ACM Press, New York, 2006, pp. 47-56.
8. D. Borrione, "ACL2-based Verification of the Communications in the Hermes Network on Chip", Proc. of SMACD'06, 2006.