Highly-scalable 3D CLOS NOC for many-core CMPs

Proceedings of the 8th IEEE International NEWCAS Conference, NEWCAS2010

Volumn , Issue , 2010, Pages 229-232

  Zia, Aamir ^a   Kannan, Sachhidh ^a   Rose, Garrett ^a   Chao, H Jonathan ^a  

^a POLYTECHNIC UNIVERSITY   (United States)

Author keywords

3D IC; CLOS; Network on chip; VLSI

Indexed keywords

3D IC; 3D MESHES; CHIP MULTIPROCESSORS; CLOS; CLOS NETWORKS; LOW POWER; MANY-CORE; NETWORK ON CHIP; POWER CONSUMPTION; PROCESSING ELEMENTS; VLSI;

SERVERS; VLSI CIRCUITS;

THREE DIMENSIONAL;

EID: 78349301604     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/NEWCAS.2010.5603776     Document Type: Conference Paper

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