Efficient sequential consistency using conditional fences

Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT

Volumn , Issue , 2010, Pages 295-306

  Lin, Changhui ^a   Nagarajan, Vijay ^b   Gupta, Rajiv ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b UNIVERSITY OF EDINBURGH   (United Kingdom)

Author keywords

active table; associates; conditional fences; interprocessor delay; memory consistency; sequential consistency

Indexed keywords

C (PROGRAMMING LANGUAGE); FENCES; MEMORY ARCHITECTURE; PARALLEL ARCHITECTURES;

ACTIVE TABLE; ASSOCIATES; CONDITIONAL FENCES; INTERPROCESSORS; MEMORY CONSISTENCY; SEQUENTIAL CONSISTENCY;

PROGRAM COMPILERS;

EID: 78149267285     PISSN: 1089795X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1854273.1854312     Document Type: Conference Paper

References (27)

1. S. V. Adve and K. Gharachorloo. Shared memory consistency models: A tutorial. IEEE Computer, 29:66-76, 1995.
2. W. Ahn, S. Qi, M. Nicolaides, J. Torrellas, J.-W. Lee, X. Fang, S. Midkiff, and D. Wong. BulkCompiler: high-performance sequential consistency through cooperative compiler and hardware support. In Proceedings of MICRO-42, pages 133-144, New York, NY, USA, 2009. ACM.
3. C. Blundell, M. M. Martin, and T. F. Wenisch. Invisifence: performance-transparent memory ordering in conventional multiprocessors. In Proceedings of ISCA-36, pages 233-244, New York, NY, USA, 2009. ACM.
4. L. Ceze, J. Tuck, P. Montesinos, and J. Torrellas. BulkSC: Bulk enforcement of sequential consistency. In Proceedings of ISCA-34, pages 278-289, 2007.
5. H. Chafi, J. Casper, B. D. Carlstrom, A. McDonald, C. C. Minh, W. Baek, C. Kozyrakis, and K. Olukotun. A scalable, non-blocking approach to transactional memory. In HPCA-13, pages 97-108, Washington, DC, USA, 2007. IEEE Computer Society.
6. W.-Y. Chen, A. Krishnamurthy, and K. Yelick. Polynomial-time algorithms for enforcing sequential consistency in SPMD programs with arrays. In LCPC, pages 2-4. Springer-Verlag, 2003.
7. E. W. Dijkstra. Cooperating sequential processes. The origin of concurrent programming: from semaphores to remote procedure calls, pages 65-138, 2002.
8. Y. Duan, X. Feng, L. Wang, C. Zhang, and P.-C. Yew. Detecting and eliminating potential violations of sequential consistency for concurrent C/C++ programs. In CGO '09: Proceedings of the 2009 International Symposium on Code Generation and Optimization, pages 25-34, Washington, DC, USA, 2009. IEEE Computer Society.
9. X. Fang, J. Lee, and S. P. Midkiff. Automatic fence insertion for shared memory multiprocessing. In ICS '03: Proceedings of the 17th annual international conference on Supercomputing, pages 285-294, New York, NY, USA, 2003. ACM.
10. K. Gharachorloo, A. Gupta, and J. Hennessy. Two techniques to enhance the performance of memory consistency models. In Proceedings of the 1991 International Conference on Parallel Processing, pages 355-364, 1991.
11. C. Gniady and B. Falsafi. Speculative sequential consistency with little custom storage. In PACT '02: Proceedings of the 2002 International Conference on Parallel Architectures and Compilation Techniques, pages 179-188, Washington, DC, USA, 2002. IEEE Computer Society.
12. C. Gniady, B. Falsafi, and T. N. Vijaykumar. Is SC + ILP = RC? In Proceedings of ISCA-26, pages 162-171, Washington, DC, USA, 1999. IEEE Computer Society.
13. L. Hammond, V. Wong, M. Chen, B. D. Carlstrom, J. D. Davis, B. Hertzberg, M. K. Prabhu, H. Wijaya, C. Kozyrakis, and K. Olukotun. Transactional memory coherence and consistency. SIGARCH Comput. Archit. News, 32(2):102, 2004.
14. A. Kamil, J. Su, and K. Yelick. Making sequential consistency practical in titanium. In SC '05: Proceedings of the 2005 ACM/IEEE conference on Supercomputing, page 15, Washington, DC, USA, 2005. IEEE Computer Society.
15. A. Krishnamurthy and K. Yelick. Optimizing parallel programs with explicit synchronization. In Proceedings of the ACM SIGPLAN '95 Conference on Programming Language Design and Implementation, pages 196-204, 1995.
16. A. Krishnamurthy and K. Yelick. Analyses and optimizations for shared address space programs. Journal of Parallel and Distributed Computing, 38, 1996.
17. L. Lamport. How to make a multiprocessor computer that correctly executes multiprocess progranm. IEEE Trans. Comput., 28(9):690-691, 1979.
18. J. Lee and D. A. Padua. Hiding relaxed memory consistency with a compiler. IEEE Trans. Comput., 50(8):824-833, 2001.
19. K. Lee, X. Fang, and S. P. Midkiff. Practical escape analyses: how good are they? In VEE '07: Proceedings of the 3rd international conference on Virtual execution environments, pages 180-190, New York, NY, USA, 2007. ACM.
20. S. P. Midkiff. Dependence analysis in parallel loops with i±k subscripts. In LCPC, pages 331-345, 1995.
21. S. P. Midkiff and D. A. Padua. Issues in the optimization of parallel programs. In Proceedings of the 1990 International Conference on Parallel Processing, Volume 2: Software, pages 105-113, Urbana-Champaign, IL, USA, 1990.
22. P. Ranganathan, V. Pai, and S. Adve. Using speculative retirement and larger instruction windows to narrow the performance gap between memory consistency models. In Proceedings of the Ninth Annual ACM Symposium on Parallel Algorithms and Architectures, page pages, 1997.
23. J. Renau, B. Fraguela, J. Tuck, W. Liu, M. Prvulovic, L. Ceze, S. Sarangi, P. Sack, K. Strauss, and P. Montesinos. SESC simulator, January 2005. http://sesc.sourceforge.net.
24. D. Shasha and M. Snir. Efficient and correct execution of parallel programs that share memory. ACM Trans. Program. Lang. Syst., 10(2):282-312, 1988.
25. Z. Sura, X. Fang, C.-L. Wong, S. P. Midkiff, J. Lee, and D. Padua. Compiler techniques for high performance sequentially consistent Java programs. In PPoPP '05: Proceedings of the tenth ACM SIGPLAN symposium on Principles and practice of parallel programming, pages 2-13, New York, NY, USA, 2005. ACM.
26. T. F. Wenisch, A. Ailamaki, B. Falsafi, and A. Moshovos. Mechanisms for store-wait-free multiprocessors. In Proceedings of ISCA-34, pages 266-277, New York, NY, USA, 2007. ACM.
27. S. C. Woo, M. Ohara, E. Torrie, J. P. Singh, and A. Gupta. The SPLASH-2 programs: characterization and methodological considerations. In Proceedings of ISCA-22, pages 24-36, New York, NY, USA, 1995. ACM.