The potential of using dynamic information flow analysis in data value prediction

Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT

Volumn , Issue , 2010, Pages 431-442

  Ghandour, Walid J ^a   Akkary, Haitham ^a   Masri, Wes ^a  

^a AMERICAN UNIVERSITY OF BEIRUT   (Lebanon)

Author keywords

computer architecture; correlation; dynamic information flow analysis; information flow strength; information theory; instruction level parallelism; program dependence analysis; value prediction

Indexed keywords

COMPUTER ARCHITECTURE; CORRELATION METHODS; FORECASTING; INFORMATION THEORY; MEMORY ARCHITECTURE; PARALLEL ARCHITECTURES; VALUE ENGINEERING;

DYNAMIC INFORMATION FLOW ANALYSIS; INFORMATION FLOWS; INSTRUCTION LEVEL PARALLELISM; PROGRAM DEPENDENCE; VALUE PREDICTION;

INFORMATION USE;

EID: 78149251416     PISSN: 1089795X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1854273.1854327     Document Type: Conference Paper

References (65)

1. M. J. Harrold and G. Rothermel. Siemens Programs, HR Variants. http://pleuma.cc.gatech.edu/aristotle/Tools/subjects/.
2. The Standard Performance Evaluation Corporation (SPEC). The SPEC Benchmark Suite. http://www.spec.org.
3. A. Gandhi, H. Akkary and S. Srinivasan. Reducing branch misprediction penalty via selective branch recovery. In Proceedings of the 10th International Symposium on High Performance Computer Architecture, February 2004.
4. A. I. Moshovos. Memory Dependence Prediction. Technical report, Ph.D. Thesis, Computer Sciences Department, University of Wisconsin, Madison, December 1998.
5. A. Moshovos, S. E. Breach, T. N. Vijaykumar and G.S. Sohi. Dynamic speculation and synchronization of memory dependences. In the Proceedings of the 24th Annual ACM/IEEE Conference on Computer Architecture, June 1997.
6. A. S. Al-Zawawi, V. K. Reddy, E. Rotenberg and H. Akkary. Transparent Control Independence (TCI). ISCA-34, June 2007.
7. A. Smith, R. Nagarajan, K. Sankaralingam, R. McDonald,D. Burger, S. W. Keckler and K. S. McKinley. Dataflow predication. Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture, pages 89-102, 2006.
8. A. Sodani and G. Sohi. Dynamic instruction reuse. Proceedings of the 24th International Symposium on Computer Architecture (ISCA), June 1997.
9. A. Sodani and G. Sohi. Understanding the differences between value prediction and instruction reuse. MICRO-31, pages 205-215, 1998.
10. H. Akkary and M. A. Driscoll. A dynamic multithreading processor. MICRO-31, November 1998.
11. A.s Moshovos and G. S. Sohi . Reducing memory latency via read-after-read memory dependence prediction. IEEE Transactions on Computers, 51(3):313-326, March 2002.
12. B. Goeman, H. Vandierendonck and K. De Bosschere. Differential fcm: Increasing value prediction accuracy by improving table usage efficiency. Proceedings of the Seventh International Symposium on High-Performance Computer Architecture (HPCA'01).
13. B. Rychlik, J. Faistl, B. Krug and J. P. Shen. Efficacy and performance impact of value prediction. 1998 International Conference on Parallel Architectures and Compiler Technology, October 1998.
14. C. J. F. Pickett and C. Verbrugge. Compiler Analyses for Improved Return Value Prediction. Technical report, Technical Report SABLETR-2004-6, Sable Research Group, School of Computer Science, McGill University, 2004.
15. C. J. F. Pickett and C. Verbrugge. Return value prediction in a java virtual machine. In PW2: Proceedings of the 2nd Value-Prediction and Value-Based Optimization Workshop, pages 40-47, October 2004.
16. G. Z. Chrysos and J. S. Emer. Memory dependence prediction using store sets. Proceedings of the 25th Annual International Symposium on Computer Architecture, June 1998.
17. T. M. Cover and J. A. Thomas. Elements of Information Theory. Wiley, New York, 1991.
18. D. J. Krus. Visual statistics: Chapter 14, regression on multiple categories, visual-statistics.net. 2006.
19. D. Tullsen and J. Seng. Storageless value prediction using prior register values. 26th International Symposium on Computer Architecture, May 1999.
20. D. E. Denning. Cryptography and Data Security. Addison-Wesley, 1982.
21. J. R. Ellis. Bulldog: A Compiler for VLIW Architectures. The MIT Press, 1986.
22. R. M. Fano. Transmission of Information: A Statistical Theory of Communications. The MIT Press, and John Wiley and Sons, New York, 1961.
23. M. Franklin. The Multiscalar Architecture. PhD thesis, University of Wisconsin, November 1993.
24. G. Venkataramani, I. Doudalis, Y. Solihin and M. Prvulovic. Flexitaint: A programmable accelerator for dynamic taint propagation. IEEE 14th International Symposium High Performance Computer Architecture, pages 173-184, February 2008.
25. H. Akkary, K. Jothi, R. Retnamma, S. Nekkalapu, D. Hall and S. Shahidzadeh. On the potential of latency tolerant execution in speculative multithreading. IFMT, November 2008.
26. H. Akkary, S. T. Srinivasan and K. Lai. Recycling waste: exploiting wrong-path execution to improve branch prediction. In ICS-17, pages 12-21, 2003.
27. J. E. Smith and G. S. Sohi. The microarchitecture of superscalar processors. Proceedings of the IEEE, 83(12):1609-1624, August 1995.
28. J. Oplinger, D. Heine and M.S. Lam. In search of speculative thread-level parallelism. Proc. Eighth Int'l Conf. Parallel Architectures Compilation Techniques, 1999.
29. J. Singer and G. Brown. Return value prediction meets information theory. In QAPL'06: Proceedings of the 4th International Workshop on Quantitative Aspects of Programming Languages, 164:137-151, October 2006. (Pubitemid 44584826)
30. J. W. Kwak and C. S. Jhon. Dynamic per-branch history length adjustment to improve branch prediction accuracy. Microprocess. Microsyst., 31(1):63-76, 2007.
31. J.D. Owens, W.J. Dally, R. Ho, D.N. Jayasimha, S.W. Keckler and L. Peh. Research challenges for on-chip interconnection networks. IEEE Micro, 27(5):96-108, September-October 2007.
32. J.G. Steffan, C.B. Colohan, A. Zhai and T.C. Mowry. Improving value communication for thread-level speculation. Proc. Eighth Int'l Symp. High-Performance Computer Architecture, 1999.
33. K. Asanovi, R. Bodik, B. C. Catanzaro, J.J. Gebis, P. Husbands, K. Keutzer, D.A. Patterson, W.L. Plishker, J. Shalf, S.W. Williams and K.A. Yelick. The Landscape of Parallel Computing Research: A View from Berkeley. Technical report, EECS UC Berkeley, Technical Report No. UCB/EECS-2006-183, 2006.
34. K. Wang and M. Franklin. Highly accurate data value prediction using hybrid predictors. Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture, pages 281-290, 1997.
35. M. S. Lam and R. P. Wilson. Limits of control flow on parallelism. Proceedings of the 19th Annual International Symposium on Computer Architecture, pages 46-57, May 1992.
36. M. Bishop. Computer security: Art and science. 2, December 2002.
37. M. Burtscher and B. G. Zorn. Exploring last n value prediction. International Conference on Parallel Architectures and Compilation Techniques, pages 66-76, October 1999.
38. M. Butler, T. Yeh, Y. Patt, M. Alsup, H. Scales and M. Shebanow. Single instruction stream parallelism is greater than two. Proceedings of the 18th Annual International Symposium on Computer Architecture, pages 276-286, 1991.
39. M. H. Lipasti and J. P. Shen. Exceeding the dataflow limit via value prediction. In Proceedings of the 29th Annual ACM/IEEE International Symposium and Workshop on Microarchitecture, pages 226-237, December 1996.
40. M.Dalton, H.Kannan and C.Kozyrakis. Raksha: A Flexible Information Flow Architecture for Software Security. Proceedings of the 34th International Symposium on Computer Architecture, 2007.
41. M.H. Lipasti, C.B. Wilkerson and J.P. Shen. Value locality and load value prediction. Proc. of the 7th. Conf. on Architectural Support for Programming Languages and Operating Systems, pages 138-147, October 1996.
42. N. Tuck and D. M. Tullsen. Multithreaded value prediction. Proceedings of the 11th International Symposium on High-Performance Computer Architecture, 2005.
43. N.J. Warter, D.M. Lavery and W.W. Hwu. The benefit of predicated execution for software pipelining. Proceeding of the Twenty-Sixth Hawaii International Conference on System Sciences, 1:497-506, January 1993.
44. P. Marcuello, A. Gonzalez and J. Tubella. Thread partitioning and value prediction for exploiting speculative thread-level parallelism. IEEE Trans. Computers, 53(2):114-125, February 2004.
45. P. Marcuello, J. Tubella, and A. Gonzelez. Value prediction for speculative multithreaded architectures. Proceedings of the 32nd International Symposium on Microarchitecture, November 1999.
46. P. S. Ahuja, K. Skadron, M. Martonosi and D. W. Clark. Multi-path execution: Opportunities and limits. In Proceedings of the 12th International Conference on Supercomputing, pages 101-108, July 1998.
47. R. J. Eickemeyer and S. Vassiliadis. A load instruction unit for pipelined processors. IBM Journal of Research and Development, 37(4):547-564, July 1993.
48. R. K. Montoye, E. Hokenek and S. L. Runyon. Design of the ibm risc system/6000 floating-point execution unit. IBM Journal of Research and Development, 34(1):59-70, January 1990. (Pubitemid 20686677)
49. R. Thomas, M. Franklin, C. Wilkerson and J. Stark. Improving branch prediction by dynamic dataflow-based identification of correlated branches from a large global history. In ISCA '03: Proceedings of the 30th annual international symposium on Computer architecture, pages 314-323, 2003.
50. R.P. Martin, A.M. Vahdat, D.E. Culler and T.E. Anderson. Effects of communication latency, overhead, and bandwidth in a cluster architecture. SIGARCH Computer Architecture News, 25(2):85-97, 1997.
51. S. Borkar. Thousand Core Chips-A Technology Perspective. 44th ACM/IEEE Design Automation Conference, 4(8):746-749, June 2007.
52. S. Hu, R. Bhargava and L. K. John. The role of return value prediction in exploiting speculative method-level parallelism. Journal of Instruction-Level Parallelism, 5:1-21, November 2003.
53. S. Kachigan. Statistical analysis: An interdisciplinary introduction to univariate and multivariate methods. 1986.
54. Y. Sazeides and J. Smith. Implementations of context-based value predictors. Technical report, ECE-TR-97-8, University of Wisconsin, Madison, 1997.
55. S. Siegel. Nonparametric Statistics For The Behavioral Sciences. NY: McGraw-Hill, 1956.
56. T. M. Austin and G. S. Sohi. Dynamic dependency analysis of ordinary programs. Proceedings of the 19th annual international symposium on Computer architecture (ISCA '92), 20(2):342-351, May 1992.
57. T. Nakra, R. Gupta and M. L. Soffa. Global context-based value prediction. Proceedings of the 5th International Symposium on High Performance Computer Architecture, pages 4-12, January 1999.
58. W. Masri, A. Podgurski and D. Leon. Detecting and debugging insecure information ows. 15th. IEEE International Symposium on Software Reliability Engineering, ISSRE, November 2004.
59. W. Masri and A. Podgurski. An empirical study of the strength of information ows in programs. In WODA '06: Proceedings of the 2006 international workshop on Dynamic systems analysis, pages 73-80, May 2006.
60. W. Masri and A. Podgurski. Algorithms and tool support for dynamic information ow analysis. Inf. Softw. Technol., 51(2):385-404, February 2009.
61. W. Masri and A. Podgurski. Measuring the strength of information ows in programs. ACM Transactions on Software Engineering and Methodology (TOSEM), 19(2), October 2009.
62. W. Mohan and M. Franklin. Improving data value prediction accuracy using path correlation. Proceedings of the fifth international conference on Architectural support for programming languages and operating systems, pages 76-84, 1992.
63. W. W. Hwu. Compiling for ilp processors. Proceedings of the IEEE, 83(12), December 1995.
64. Y. Sazeides and J. E. Smith. The predictability of data values. Proceedings of the 30th International Symposium on Microarchitecture, December 1997.
65. Y. Sazeides, S. Vassiliadis and J.E. Smith. The performance potential of data dependence speculation and collapsing. MICRO-29, December 1996.