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Volumn , Issue , 2010, Pages

Concurrent test of network-on-chip interconnects and routers

Author keywords

[No Author keywords available]

Indexed keywords

CONCURRENT TEST; FAULT COVERAGES; INTERCONNECT FAULTS; NETWORK-ON-CHIP INTERCONNECTS; TEST METHOD; TEST SEQUENCE;

EID: 77958144397     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/LATW.2010.5550355     Document Type: Conference Paper
Times cited : (29)

References (12)
  • 1
    • 0036149420 scopus 로고    scopus 로고
    • Networks on Chips: A New SoC Paradigm
    • Jan.
    • Benini, L.; De Micheli, G.; "Networks on Chips: A New SoC Paradigm, IEEE Comp. Vol.35 no.1, Jan. 2002.
    • (2002) IEEE Comp. , vol.35 , Issue.1
    • Benini, L.1    De Micheli, G.2
  • 5
    • 49149125635 scopus 로고    scopus 로고
    • A High-Fault-Coverage Approach for the Test of Data, Control and Handshake Interconnects in Mesh Networks-on-Chip
    • Sept.
    • Cota, E. et al.; A High-Fault-Coverage Approach for the Test of Data, Control and Handshake Interconnects in Mesh Networks-on-Chip, IEEE Transactions on Computers, Volume 57, Issue 9, pp. 1202-1215, Sept. 2008.
    • (2008) IEEE Transactions on Computers , vol.57 , Issue.9 , pp. 1202-1215
    • Cota, E.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.