New scaling limitation of the floating gate cell in NAND Flash Memory

IEEE International Reliability Physics Symposium Proceedings

Volumn , Issue , 2010, Pages 599-603

  Kim, Yong Seok ^a   Lee, Dong Jun ^a   Lee, Chi Kyoung ^a   Choi, Hyun Ki ^a   Kim, Seong Soo ^a   Song, Jai Hyuk ^a   Song, Du Heon ^a   Choi, Jeong Hyuk ^a   Suh, Kang Deog ^b   Chung, Chilhee ^a  

^a SAMSUNG Electronics   (South Korea)

^b Sungkyunkwan University   (South Korea)

Author keywords

Floating gate type NAND Flash; Interference; Scaling limitation

Indexed keywords

BIT LINES; FLOATING GATES; FUTURE TECHNOLOGIES; INTERFERENCE; INTERFERENCE PHENOMENA; NAND FLASH; NAND FLASH MEMORY; SCALING LIMITATION;

NAND CIRCUITS;

FLASH MEMORY;

EID: 77957923242     PISSN: 15417026     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IRPS.2010.5488765     Document Type: Conference Paper

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