Floating Gate Super Multi Level NAND Flash Memory Technology for 30nm and beyond

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2008, Pages

  Kamigaichi, T ^a   Arai, F ^a   Nitsuta, H ^a   Endo, M ^a   Nishihara, K ^a   Murata, T ^a   Takekida, H ^a   Izumi, T ^a   Uchida, K ^a   Maruyama, T ^a   Kawabata, I ^a   Suyama, Y ^a   Sato, A ^a   Ueno, K ^a   Takeshita, H ^a   Joko, Y ^a   Watanabe, S ^a   Liu, Y ^a   Meguro, H ^a   Kajita, A ^a   Ozawa, Y ^a   Watanabe, T ^a   Sato, S ^a   Tomiie, H ^b   Kanamaru, Y ^b   Shoji, R ^b   Lai, C H ^b   Nakamichi, M ^b   Oowada, K ^b   Ishigaki, T ^b   Hemink, G ^b   Dutta, D ^b   Dong, Y ^b   Chen, C ^b   Liang, G ^b   Higashitani, M ^b   Lutze, J ^b   more..

^a TOSHIBA CORPORATION   (Japan)

^b SanDisk Corporation   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DATA RETENTIONS; FLOATING GATES; MULTI LEVELS; NAND FLASH MEMORIES; PROGRAM/ERASE;

DATA STORAGE EQUIPMENT; ELECTRON DEVICES; NAND CIRCUITS;

FLASH MEMORY;

EID: 64549128110     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2008.4796825     Document Type: Conference Paper

References (4)

1. K. Kim et al., NVSMW, pp.9-11 (2006)
2. N. Shibata et al., Symp. On VLSI Circuit, p.190 (2007)
3. M. Noguchi et al., IEDM Tech Dig., p.445 (2007)
4. S. S ato et al., IEDM Tech Dig., p.291 (1997)