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Volumn 57, Issue 10, 2010, Pages 2632-2643

A five-decade dynamic-range ambient-light-independent calibrated signed-spatial-contrast AER retina with 0.1-ms latency and optional time-to-first-spike mode

Author keywords

Address event representation; analog circuits; artificial retina; bio inspired circuits; calibration; contrast sensors; image sensors; low power circuits; spiking circuits; transistor mismatch

Indexed keywords

ANALOG CIRCUITS; BIOMIMETICS; CALIBRATION; IMAGE SENSORS; LOW POWER ELECTRONICS;

EID: 77957919783     PISSN: 15498328     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2010.2046971     Document Type: Article
Times cited : (43)

References (31)
  • 4
    • 9144260058 scopus 로고    scopus 로고
    • A 128 × 128, pixel 120-dB dynamic-range vision-sensor chip for image contrast and orientation extraction
    • Dec
    • P. F. Ruedi, P. Heim, F. Kaess, E. Grenet, F. Heitger, P.-Y. Burgi, S. Gyger, and P. Nussbaum, - A 128 × 128, pixel 120-dB dynamic-range vision-sensor chip for image contrast and orientation extraction, - IEEE J. Solid-State Circuits, vol. 38, no. 12, pp. 2325-2333, Dec. 2003.
    • (2003) IEEE J. Solid-State Circuits , vol.38 , Issue.12 , pp. 2325-2333
    • Ruedi, P.F.1    Heim, P.2    Kaess, F.3    Grenet, E.4    Heitger, F.5    Burgi, P.-Y.6    Gyger, S.7    Nussbaum, P.8
  • 5
    • 0036474823 scopus 로고    scopus 로고
    • A 100 × 100 pixel silicon retina for gradient extraction with steering filter capabilities and temporal output coding
    • DOI 10.1109/4.982422, PII S0018920002006753
    • M. Barbaro, P. Y. Burgi, A. Mortara, P. Nussbaum, and F. Heitger, - A 100 × 100 pixel silicon retinafor gradient extraction with steering filter capabilities and temporal output coding, - IEEE J. Solid-State Circuits, vol. 37, no. 2, pp. 160-172, Feb. 2002. (Pubitemid 34278431)
    • (2002) IEEE Journal of Solid-State Circuits , vol.37 , Issue.2 , pp. 160-172
    • Barbaro, M.1    Burgi, P.-Y.2    Mortara, A.3    Nussbaum, P.4    Heitger, F.5
  • 6
    • 34247170484 scopus 로고    scopus 로고
    • Arbitrated time-to-first spike CMOS image sensor with on-chip histogram equalization
    • DOI 10.1109/TVLSI.2007.893624
    • S. Chen and A. Bermak, - Arbitrated time-to-first spike CMOS image sensor with on-chip histogram equalization, - IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 15, no. 3, pp. 346-357, Mar. 2007. (Pubitemid 46600152)
    • (2007) IEEE Transactions on Very Large Scale Integration (VLSI) Systems , vol.15 , Issue.3 , pp. 346-357
    • Chen, S.1    Bermak, A.2
  • 7
    • 4344640509 scopus 로고    scopus 로고
    • A time-to-first-spike CMOS imager
    • Vancouver, AB, Canada
    • X. G. Qi and J. Harris, - A time-to-first-spike CMOS imager, - in Proc. IEEEISCAS, Vancouver, AB, Canada, 2004, pp. 824-827.
    • (2004) Proc. IEEEISCAS , pp. 824-827
    • Qi, X.G.1    Harris, J.2
  • 11
    • 38849206826 scopus 로고    scopus 로고
    • A 128 × 128 120 dB 15 μs latency asynchronous temporal contrast vision sensor
    • DOI 10.1109/JSSC.2007.914337
    • P. Lichtsteiner, C. Posch, and T. Delbrück, - A 128 X 128 120 dB 15 μs latency asynchronous temporal contrast vision sensor, - IEEE J. Solid-State Circuits, vol. 43, no. 2, pp. 566-576, Feb. 2008. (Pubitemid 351190224)
    • (2008) IEEE Journal of Solid-State Circuits , vol.43 , Issue.2 , pp. 566-576
    • Lichtsteiner, P.1    Posch, C.2    Delbruck, T.3
  • 12
    • 0031367784 scopus 로고    scopus 로고
    • Motion vision sensor architecture with asynchronous self-signaling pixels
    • M. Arias-Estrada, D. Poussart, and M. Tremblay, - Motion vision sensor architecture with asynchronous self-signaling pixels, - in Proc. 7th Int. Workshop CAMP, 1997, pp. 75-83.
    • (1997) Proc. 7th Int. Workshop CAMP , pp. 75-83
    • Arias-Estrada, M.1    Poussart, D.2    Tremblay, M.3
  • 13
    • 12944261384 scopus 로고    scopus 로고
    • A biologically inspired modular VLSI system for visual measurement of self-motion
    • Dec
    • C. M. Higgins and S. A. Shams, - A biologically inspired modular VLSI system for visual measurement of self-motion, - IEEE Sensors J., vol. 2, no. 6, pp. 508-528, Dec. 2002.
    • (2002) IEEE Sensors J. , vol.2 , Issue.6 , pp. 508-528
    • Higgins, C.M.1    Shams, S.A.2
  • 14
    • 12944268790 scopus 로고    scopus 로고
    • Reconfigurable biologically inspired visual motion systems using modular neuromorphic VLSI Chips
    • DOI 10.1109/TCSI.2004.838307
    • E. Özalevli and C. M. Higgins, - Reconfigurable biologically inspired visual motion system using modular neuromorphic VLSI chips, - IEEE Trans. Circuits Syst. I Reg. Papers, vol. 52, no. 1, pp. 79-92, Jan. 2005. (Pubitemid 40173706)
    • (2005) IEEE Transactions on Circuits and Systems I: Regular Papers , vol.52 , Issue.1 , pp. 79-92
    • Ozalevli, E.1    Higgins, C.M.2
  • 17
    • 1642308838 scopus 로고    scopus 로고
    • Optic nerve signals in a neuromorphic chip: Parts 1
    • Apr
    • K. A. Zaghloul and K. Boahen, - Optic nerve signals in a neuromorphic chip: Parts 1, - IEEE Trans. BiomedEng., vol. 51, no. 4, pp. 657-666, Apr. 2004.
    • (2004) IEEE Trans. BiomedEng. , vol.51 , Issue.4 , pp. 657-666
    • Zaghloul, K.A.1    Boahen, K.2
  • 18
    • 1642333215 scopus 로고    scopus 로고
    • Optic nerve signals in a neuromorphic chip: Part 2
    • Apr
    • K. A. Zaghloul and K. Boahen, - Optic nerve signals in a neuromorphic chip: Part 2, - IEEE Trans. Biomed Eng., vol. 51, no. 4, pp. 667-675, Apr. 2004.
    • (2004) IEEE Trans. Biomed. Eng. , vol.51 , Issue.4 , pp. 667-675
    • Zaghloul, K.A.1    Boahen, K.2
  • 19
    • 0029895137 scopus 로고    scopus 로고
    • Speed of processing in the human visual system
    • DOI 10.1038/381520a0
    • S. Thorpe, D. Fize, and C. Marlot, - Speed of processing in the human visual system, - Nature, vol. 381, no. 6582, pp. 520-522, Jun. 1996. (Pubitemid 26170929)
    • (1996) Nature , vol.381 , Issue.6582 , pp. 520-522
    • Thorpe, S.1    Fize, D.2    Marlot, C.3
  • 20
    • 2542445396 scopus 로고    scopus 로고
    • SpikeNet: Real-time visual processing with one spike per neuron
    • DOI 10.1016/j.neucom.2004.01.138, PII S0925231204001432
    • S. Thorpe, R. Guyonneau, N. Guilbaud, J.-M. Allegraud, and R. VanRullen, - SpikeNet: Real-time visual processing with one spike per neuron, - Neurocomputing, vol. 58-60, pp. 857-864, Jun. 2004. (Pubitemid 38684343)
    • (2004) Neurocomputing , vol.58-60 , pp. 857-864
    • Thorpe, S.J.1    Guyonneau, R.2    Guilbaud, N.3    Allegraud, J.-M.4    VanRullen, R.5
  • 21
    • 0001073983 scopus 로고
    • A contrast-sensitive retina with reciprocal synapses
    • J. E. Moody, Ed. San Mateo, CA: Morgan Kaufmann
    • K. Boahen and A. Andreou, - A contrast-sensitive retina with reciprocal synapses, - in Advances in Neural Information Processing, J. E. Moody, Ed. San Mateo, CA: Morgan Kaufmann, 1992, pp. 764-772.
    • (1992) Advances in Neural. Information Processing , pp. 764-772
    • Boahen, K.1    Andreou, A.2
  • 22
    • 34547137658 scopus 로고    scopus 로고
    • A spatial contrast retina with on-chip calibration for neuromorphic spike-based AER vision systems
    • DOI 10.1109/TCSI.2007.900179, Transactions on Circuits and Systems I: Regular Papers, IEEE Transactions on [Circuits and Systems I: Fundamental Theory and Applications, IEEE
    • J. Costas-Santos, T. Serrano-Gotarredona, R. Serrano-Gotarredona, and B. Linares-Barranco, - A spatial contrast retina with on-chip calibration for neuromorphic spike-based AER vision systems, - IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 54, no. 7, pp. 1444-1458, Jul. 2007. (Pubitemid 47104011)
    • (2007) IEEE Transactions on Circuits and Systems I: Regular Papers , vol.54 , Issue.7 , pp. 1444-1458
    • Costas-Santos, J.1    Serrano-Gotarredona, T.2    Serrano-Gotarredona, R.3    Linares-Barranco, B.4
  • 23
    • 84893720956 scopus 로고    scopus 로고
    • CMOS mismatch model valid from weak to strong inversion
    • Sep
    • T. Serrano-Gotarredona and B. Linares-Barranco, - CMOS mismatch model valid from weak to strong inversion, - in Proc. ESSCIRC, Sep. 2003, pp. 627-630.
    • (2003) Proc. ESSCIRC , pp. 627-630
    • Serrano-Gotarredona, T.1    Linares-Barranco, B.2
  • 24
    • 0041695254 scopus 로고    scopus 로고
    • On the design and characterization of femtoampere current-mode circuits
    • Aug
    • B. Linares-Barranco and T. Serrano-Gotarredona, - On the design and characterization of femtoampere current-mode circuits, - IEEE J. Solid-State Circuits, vol. 38, no. 8, pp. 1353-1363, Aug. 2003.
    • (2003) IEEE J. Solid-state Circuits , vol.38 , Issue.8 , pp. 1353-1363
    • Linares-Barranco, B.1    Serrano-Gotarredona, T.2
  • 25
    • 70350146602 scopus 로고    scopus 로고
    • A mismatch calibrated bipolar spatial contrast AER retina with adjustable contrast threshold
    • May
    • J. A. Leñero-Bardallo, T. Serrano-Gotarredona, and B. Linares-Barranco, - A mismatch calibrated bipolar spatial contrast AER retina with adjustable contrast threshold, - in Proc. IEEE ISCAS, May 2009, pp. 1493-1496.
    • (2009) Proc. IEEE ISCAS , pp. 1493-1496
    • Leñero-Bardallo, J.A.1    Serrano-Gotarredona, T.2    Linares-Barranco, B.3
  • 26
    • 0030102060 scopus 로고    scopus 로고
    • Translinear circuits in subthreshold CMOS
    • Apr
    • A. G. Andreou and K. Boahen, - Translinear circuits in subthreshold CMOS, - Analog Integr. Circuits Signal Process., vol. 9, no. 2, pp. 141-166, Apr. 1996.
    • (1996) Analog Integr. Circuits Signal Process. , vol.9 , Issue.2 , pp. 141-166
    • Andreou, A.G.1    Boahen, K.2
  • 27
    • 0022417790 scopus 로고
    • Computational vision and regularization theory
    • DOI 10.1038/317314a0
    • T. Poggio, V. Torre, and C. Koch, - Computational vision and regularization theory, - Nature, vol. 317, no. 26, pp. 314-319, Sep. 1985. (Pubitemid 15232518)
    • (1985) Nature , vol.317 , Issue.6035 , pp. 314-319
    • Poggio, T.1    Torre, V.2    Koch, C.3
  • 29
    • 46649092512 scopus 로고    scopus 로고
    • A calibration technique for very low current and compact tunable neuromorphic cells. Application to 5-bit 20 nA DACs
    • Jun
    • J. A. Leñero-Bardallo, T. Serrano-Gotarredona, and B. Linares-Barranco, - A calibration technique for very low current and compact tunable neuromorphic cells. Application to 5-bit 20 nA DACs, - IEEE Trans. Circuits Syst. II, Exp. Brief, vol. 55, no. 6, pp. 522-526, Jun. 2008.
    • (2008) IEEE Trans. Circuits Syst. II, Exp. Brief , vol.55 , Issue.6 , pp. 522-526
    • Leñero-Bardallo, J.A.1    Serrano-Gotarredona, T.2    Linares-Barranco, B.3
  • 30
    • 0033740171 scopus 로고    scopus 로고
    • Point-to-point connectivity between neuromorphic chips using address events
    • May
    • K. Boahen, - Point-to-point connectivity between neuromorphic chips using address events, - IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 47, no. 5, pp. 416-434, May 2000.
    • (2000) IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process. , vol.47 , Issue.5 , pp. 416-434
    • Boahen, K.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.