A low-power 2.4-GHz CMOS GFSK transceiver with a digital demodulator using time-to-digital conversion

IEEE Transactions on Circuits and Systems I: Regular Papers

Volumn 56, Issue 12, 2009, Pages 2738-2748

  Chen, Chia Pei ^a   Yang, Ming Jen ^a   Huang, Hsun Hsiu ^a   Chiang, Tung Ying ^a   Chen, Jheng Liang ^a   Chen, Ming Chieh ^a   Wen, Kuei Ann ^b  

^a Alfaplus Semiconductor   (Taiwan)

^b NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

Complex bandpass filter; Demodulator; Frequency synthesizer; Low noise amplifier (LNA); Open loop VCO modulation; Time to digital converter (TDC)

Indexed keywords

BANDPASS AMPLIFIERS; BANDPASS FILTERS; CMOS INTEGRATED CIRCUITS; DELAY LOCK LOOPS; DEMODULATORS; ELECTRIC POWER UTILIZATION; FREQUENCY ALLOCATION; FREQUENCY CONVERTERS; FREQUENCY SHIFT KEYING; FREQUENCY SYNTHESIZERS; MICROWAVE DEMODULATORS; RANGE FINDING; TRANSCEIVERS; VARIABLE FREQUENCY OSCILLATORS;

COMPLEX BAND-PASS FILTERS; LOW-POWER CONSUMPTION; OPEN-LOOP; RECEIVER ARCHITECTURE; SYNCHRONIZATION PROBLEM; TIME TO DIGITAL CONVERSION; TIME TO DIGITAL CONVERTERS; TRANSMITTER FREQUENCIES;

LOW NOISE AMPLIFIERS;

EID: 77957749544     PISSN: 15498328     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2009.2016184     Document Type: Article

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