Characterization of contact module failure mechanisms for SOI technology using E-beam inspection and in-line TEM

ASMC (Advanced Semiconductor Manufacturing Conference) Proceedings

Volumn , Issue , 2010, Pages 270-276

  Zhou, Xing J ^a   Patterson, Oliver D ^a   Lee, Woo Hyeong ^a   Kang, Hyoung H ^a   Hahn, Roland ^b  

^a IBM RESEARCH   (United States)

^b KLA TENCOR CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHEMICAL MECHANICAL PLANARIZATIONS; DEFECT SITES; E-BEAM INSPECTION; ETCH PROCESS; FAILURE MECHANISM; IN-LINE; SOI TECHNOLOGY; TEM; TEST STRUCTURE; TRANSMISSION ELECTRON MICROSCOPE; VOLTAGE CONTRAST; YIELD LEARNING;

INSPECTION; MANUFACTURE; TRANSMISSION ELECTRON MICROSCOPY; TUNGSTEN;

SILICON ON INSULATOR TECHNOLOGY;

EID: 77957552164     PISSN: 10788743     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASMC.2010.5551467     Document Type: Conference Paper

References (11)

1. O. D. Patterson, K. Wu, D. Mocuta, K. Nafisi, "Test structure and ebeam inspection methodology for in-line detection of (non-visual) missing spacer defects," IEEE/SEMI Advanced Semiconductor Manufacturing Conference Proceedings, pp. 48-53, June 2007.
2. R. Guldi, J. Shaw, J. Ritchison, S. Oestreich, K. Davis, R. Fiordalice, "Characterization of Copper Voids in Dual Damascene Processes", IEEE/SEMI Advanced Semiconductor Manufacturing Conference Proceedings,, pp. 597-602, Nov. 2004.
3. O. Moreau, A. Kang, V. Mantovani, I. Mica, M.L.Polignano, L. Avaro, C. Pastore, G. Pavia, "Early detection of crystal defects in the device process flow by electron beam inspection", IEEE/SEMI Advanced Semiconductor Manufacturing Conference Proceedings,, pp. 334-339, May 2006.
4. J. Jau, W. Fang, H. Xiao, "A Novel Method for In-line Process Monitoring by Measuring the Gray Level Values of SEM Images", Proceedings of ISSM, pp. 143-146, 2005.
5. A. Ache, K. Wu, N. Rowand, "E-beam inspection of SOI wafers for the evaluation of barrier nitride RIE etching," Advanced Semiconductor Manufacturing Conference and Workshop, IEEE/SEMI issue, pp. 124-126, April 2005.
6. M. Horstmann, "Advanced SOI CMOS transistor technology for high performance microprocessors," Solid-State Electronics, vol. 53, no. 12, pp. 1212-1219, Dec. 2009.
7. S. Cristoloveanu, F. Balestra, "Silicon on insulator: Technology and Devices," Advanced Semiconductor and Organic Nano-Techniques, pp. 325-365, 2003.
8. Y. H. Liu, Y. L. Tu, W. Y. Lain, B. W. Chan, M. Chi, "Contact size dependence of highly selective self-aligned contact etching with polymer formation and its mechanism," Advanced Semiconductor Manufacturing Conference and Workshop, IEEE/SEMI issue, pp. 153-156, Sep. 2000.
9. KLA-Tencor, "Electron Beam Wafer Inspection System", online (http://www.kla-tencor.com/front-end-defect-inspection/es35.html).
10. H. H. Kang, M. A. Gribelyuk, O. D. Patterson, S. B. Herschbein, "A new method of wafer level plan view TEM sample preparation by DualBeam," Proceedings of ITSTFA, pp. 168-171, 2008.
11. O. D. Patterson, K. Wu, H. H. Kang, P. Feichtinger, "In-line process window monitoring using voltage contrast inspection," IEEE/SEMI Advanced Semiconductor Manufacturing Conference Proceedings,, pp.19-24, May 2008.