Optimal design of the power-delivery network for multiple voltage-island system-on-chips

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 28, Issue 1, 2009, Pages 888-900

  Amelifard, Behnam ^a   Pedram, Massoud ^b  

^a QUALCOMM INC   (United States)

^b UNIVERSITY OF SOUTHERN CALIFORNIA   (United States)

Author keywords

DC DC converter; Energy efficiency; Low power design; Power delivery network (PDN); System on chip (SoC); Voltage island; Voltage regulator

Indexed keywords

COMBINATORIAL PROBLEM; LOW-POWER DESIGN; MULTIPLE VOLTAGE; OPTIMAL DESIGN; OUTPUT VOLTAGES; POWER EFFICIENCY; POWER EFFICIENT; POWER SOURCES; POWER SUPPLY; SECOND LAYER; SOC DESIGNS; SWITCH NETWORK; SYSTEM ON CHIP DESIGN; SYSTEM ON CHIPS; SYSTEM-ON-CHIP; SYSTEM-ON-CHIP (SOC); TREE TOPOLOGY; TWO LAYERS; VOLTAGE ASSIGNMENT; VOLTAGE ISLAND; VOLTAGE LEVELS; VOLTAGE-SCALING;

APPLICATION SPECIFIC INTEGRATED CIRCUITS; DC-DC CONVERTERS; DESIGN; DYNAMIC PROGRAMMING; ELECTRIC POTENTIAL; ENERGY EFFICIENCY; HVDC POWER TRANSMISSION; MICROPROCESSOR CHIPS; SWITCHING CIRCUITS; VOLTAGE CONTROL; VOLTAGE STABILIZING CIRCUITS;

PROGRAMMABLE LOGIC CONTROLLERS;

EID: 77955197089     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

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