-
3
-
-
84893797318
-
Low power embedded software optimization using symbolic algebra
-
IEEE Computer Society
-
A. Peymandoust et al., "Low power embedded software optimization using symbolic algebra," in DATE '02. IEEE Computer Society, 2002, pp. 1052-1058.
-
(2002)
DATE '02
, pp. 1052-1058
-
-
Peymandoust, A.1
-
4
-
-
51449103393
-
High-level optimization for low power consumption on microprocessor-based systems
-
IEEE Computer Society
-
D. A. Ortiz and N. G. Santiago, "High-level optimization for low power consumption on microprocessor-based systems," in MWSCAS 2007. IEEE Computer Society, 2007, pp. 1265-1268.
-
(2007)
MWSCAS 2007
, pp. 1265-1268
-
-
Ortiz, D.A.1
Santiago, N.G.2
-
5
-
-
56749090645
-
Simultaneous optimization of memory configuration and code allocation for low power embedded systems
-
ACM
-
T. Matsumura et al., "Simultaneous optimization of memory configuration and code allocation for low power embedded systems," in GLSVLSI '08. ACM, 2008, pp. 403-406.
-
(2008)
GLSVLSI '08
, pp. 403-406
-
-
Matsumura, T.1
-
6
-
-
64549123962
-
Data-reuse exploration under an on-chip memory constraint for low-power FPGA-based systems
-
Q. Liu et al., "Data-reuse exploration under an on-chip memory constraint for low-power FPGA-based systems," IET Computers & Digital Techniques, vol. 3, no. 3, pp. 235-246, 2009.
-
(2009)
IET Computers & Digital Techniques
, vol.3
, Issue.3
, pp. 235-246
-
-
Liu, Q.1
-
8
-
-
46249117311
-
Data reuse exploration for FPGA based platforms applied to the full search motion estimation algorithm
-
Q. Liu et al., "Data reuse exploration for FPGA based platforms applied to the full search motion estimation algorithm," in Proc. Int. Conf. on FPL, Matrid, Spain, 2006, pp. 389-394.
-
Proc. Int. Conf. on FPL, Matrid, Spain, 2006
, pp. 389-394
-
-
Liu, Q.1
-
9
-
-
52649171941
-
Outer loop pipelining for application specific datapaths in FPGAs
-
K. Turkington et al., "Outer loop pipelining for application specific datapaths in FPGAs," IEEE Trans. Very Large Scale Integr. Syst., vol. 16, no. 10, pp. 1268-1280, 2008.
-
(2008)
IEEE Trans. Very Large Scale Integr. Syst.
, vol.16
, Issue.10
, pp. 1268-1280
-
-
Turkington, K.1
-
10
-
-
3042613727
-
Single-dimension software pipelining for multi-dimensional loops
-
H. Rong et al., "Single-dimension software pipelining for multi-dimensional loops," in IEEE Proc. on CGO, 2004, pp. 163-174.
-
IEEE Proc. on CGO, 2004
, pp. 163-174
-
-
Rong, H.1
-
11
-
-
28344452703
-
The impact of pipelining on energy per operation in field-programmable gate arrays
-
Springer
-
S. J. Wilton et al., "The impact of pipelining on energy per operation in field-programmable gate arrays," in FPL. Springer, 2004, pp. 719-728.
-
(2004)
FPL
, pp. 719-728
-
-
Wilton, S.J.1
-
12
-
-
60349124038
-
Map-reduce as a programming model for custom computing machines
-
J. H. Yeung et al., "Map-reduce as a programming model for custom computing machines," in FCCM, 2008, pp. 149-159.
-
(2008)
FCCM
, pp. 149-159
-
-
Yeung, J.H.1
-
13
-
-
85030321143
-
Mapreduce: Simplified data processing on large clusters
-
J. Dean and S. Ghemawat, "Mapreduce: Simplified data processing on large clusters," in 6th Symp. on OSDI, December 2004, pp. 137-150.
-
6th Symp. on OSDI, December 2004
, pp. 137-150
-
-
Dean, J.1
Ghemawat, S.2
-
14
-
-
48149083996
-
Improved rate control and motion estimation for h.264 encoder
-
L. Merritt and R. Vanam, "Improved rate control and motion estimation for h.264 encoder," in ICIP 2007, 2007, pp. 309-312.
-
(2007)
ICIP 2007
, pp. 309-312
-
-
Merritt, L.1
Vanam, R.2
-
15
-
-
77953089686
-
-
accessed 2006
-
http://www.pages.drexel.edu/~weg22/edge.html, accessed 2006.
-
-
-
|