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Volumn 2010, Issue , 2010, Pages

A platform-based methodology for system-level mixed-signal design

Author keywords

[No Author keywords available]

Indexed keywords

AD-HOC TECHNIQUES; DEEP SUB-MICRON TECHNOLOGY; DESIGN CENTERING; DESIGN REUSE; DESIGN SPACES; EFFICIENT DESIGNS; ELECTRONIC CIRCUITS; EMBEDDED ELECTRONIC SYSTEMS; EMBEDDED SYSTEM DESIGN; FEASIBILITY MODELS; LIBRARY COMPONENTS; MARKET CONSTRAINTS; MEET-IN-THE-MIDDLE; MIXED-SIGNAL DESIGN; NEW DESIGN; PIPELINE A/D CONVERTER; PLATFORM BASED DESIGN; RECEIVER FRONT-ENDS; ROBUSTNESS TO MODELING ERRORS; SYSTEM CONSTRAINTS; SYSTEM LEVEL DESIGN; SYSTEM LEVELS; SYSTEMATIC EXPLORATION; TEMPERATURE VARIATION; TOPDOWN; UWB COMMUNICATION;

EID: 77952539169     PISSN: 16873955     EISSN: 16873963     Source Type: Journal    
DOI: 10.1155/2010/261583     Document Type: Article
Times cited : (3)

References (30)
  • 1
    • 34547824056 scopus 로고    scopus 로고
    • Quo vadis, SLD? Reasoning about the trends and challenges of system level design
    • Sangiovanni-Vincentelli A., Quo vadis, SLD? Reasoning about the trends and challenges of system level design Proceedings of the IEEE 2007 95 3 467 506
    • (2007) Proceedings of the IEEE , vol.95 , Issue.3 , pp. 467-506
    • Sangiovanni-Vincentelli, A.1
  • 18
    • 0028044345 scopus 로고    scopus 로고
    • Top-down, constraint-driven design methodology based generation of n-bit interpolative current source D/A converters
    • May 1994 San Diego, Calif, USA
    • Chang H., Liu E., Neff R., Top-down, constraint-driven design methodology based generation of n-bit interpolative current source D/A converters Proceedings of the Custom Integrated Circuits Conference (CICC 94) May 1994 San Diego, Calif, USA 369 372
    • Proceedings of the Custom Integrated Circuits Conference (CICC 94) , pp. 369-372
    • Chang, H.1    Liu, E.2    Neff, R.3
  • 29
    • 0033893576 scopus 로고    scopus 로고
    • Digital cancellation of D/A converter noise in pipelined A/D converters
    • Galton I., Digital cancellation of D/A converter noise in pipelined A/D converters IEEE Transactions on Circuits and Systems 2000 47 3 185 196
    • (2000) IEEE Transactions on Circuits and Systems , vol.47 , Issue.3 , pp. 185-196
    • Galton, I.1
  • 30
    • 0348233280 scopus 로고    scopus 로고
    • A 12-bit 75-MS/s pipelined ADC using open-loop residue amplification
    • Murmann B., Boser B. E., A 12-bit 75-MS/s pipelined ADC using open-loop residue amplification IEEE Journal of Solid-State Circuits 2003 38 12 2040 2050
    • (2003) IEEE Journal of Solid-State Circuits , vol.38 , Issue.12 , pp. 2040-2050
    • Murmann, B.1    Boser, B.E.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.