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Volumn 47, Issue 3, 2000, Pages 185-196

Digital cancellation of D/A converter noise in pipelined A/D converters

Author keywords

[No Author keywords available]

Indexed keywords

CALIBRATION; DIGITAL SIGNAL PROCESSING; DIGITAL TO ANALOG CONVERSION; ERROR CORRECTION; PIPELINE PROCESSING SYSTEMS; SPURIOUS SIGNAL NOISE;

EID: 0033893576     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.826744     Document Type: Article
Times cited : (123)

References (8)
  • 1
    • 0023599417 scopus 로고    scopus 로고
    • "A pipelined 5-Msample/s 9-bit analog-to-digital converter,"
    • vol. SC-22, pp. 954-961, Dec. 1987.
    • S. H. Lewis and P. R. Gray, "A pipelined 5-Msample/s 9-bit analog-to-digital converter," IEEE J. Solid State Circuits, vol. SC-22, pp. 954-961, Dec. 1987.
    • IEEE J. Solid State Circuits
    • Lewis, S.H.1    Gray, P.R.2
  • 2
    • 0024122159 scopus 로고    scopus 로고
    • "A pipelined 13-bit 250-ks/s 5-V analog-to-digital converter,"
    • vol. 23, pp. 1316-1323, Dec. 1988.
    • S. Sutarja and P. R. Gray, "A pipelined 13-bit 250-ks/s 5-V analog-to-digital converter," IEEEJ. Solid State Circuits, vol. 23, pp. 1316-1323, Dec. 1988.
    • IEEEJ. Solid State Circuits
    • Sutarja, S.1    Gray, P.R.2
  • 3
    • 0024134207 scopus 로고    scopus 로고
    • "A 16-bit 4'th order noise-shaping D/A converter,"
    • 1988, pp. 21.7.1-21.7.4.
    • L. R. Carley and J. Kenney, "A 16-bit 4'th order noise-shaping D/A converter," in lEEEProc. CICC, 1988, pp. 21.7.1-21.7.4.
    • LEEEProc. CICC
    • Carley, L.R.1    Kenney, J.2
  • 4
    • 0024645333 scopus 로고    scopus 로고
    • "A noise shaping coder topology for 15+ bits converters,"
    • vol. 24, pp. 267-273, Apr. 1989.
    • L. R. Carley, "A noise shaping coder topology for 15+ bits converters," IEEEJ. Solid-State Circuits, vol. 24, pp. 267-273, Apr. 1989.
    • IEEEJ. Solid-State Circuits
    • Carley, L.R.1
  • 5
    • 0030402994 scopus 로고    scopus 로고
    • "A stereo multibit sigma delta DAC with asynchronous master-clock interface,"
    • vol. 31, pp. 1881-1887, Dec. 1996.
    • T. W. Kwan, R. W. Adams, and R. Libert, "A stereo multibit sigma delta DAC with asynchronous master-clock interface," IEEE J. Solid State Circuits, vol. 31, pp. 1881-1887, Dec. 1996.
    • IEEE J. Solid State Circuits
    • Kwan, T.W.1    Adams, R.W.2    Libert, R.3
  • 6
    • 0031257247 scopus 로고    scopus 로고
    • "Spectral shaping of circuit errors in digital-to-analog converters,"
    • vol. 44, pp. 808-817, Oct. 1997.
    • I. Gallon, "Spectral shaping of circuit errors in digital-to-analog converters," IEEE Trans. Circuits Syst. II, vol. 44, pp. 808-817, Oct. 1997.
    • IEEE Trans. Circuits Syst. II
    • Gallon, I.1
  • 7
    • 0017542211 scopus 로고    scopus 로고
    • "A necessary and sufficient condition for quantization errors to be uniform and white,"
    • vol. ASSP-25, pp. 442148, Oct. 1977.
    • A. B. Sripad and D. L. Snyder, "A necessary and sufficient condition for quantization errors to be uniform and white," IEEE Trans. Acoust., Speech, Signal Processing, vol. ASSP-25, pp. 442148, Oct. 1977.
    • IEEE Trans. Acoust., Speech, Signal Processing
    • Sripad, A.B.1    Snyder, D.L.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.