Mixed signal design space exploration through analog platforms

Proceedings - Design Automation Conference

Volumn , Issue , 2005, Pages 875-880

  De Bernardinis, F ^a,b   Nuzzo, P ^b   Vincentelli, A Sangiovanni ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b UNIVERSITY OF PISA   (Italy)

Author keywords

Algorithms

Indexed keywords

ABSTRACTING; ANALOG TO DIGITAL CONVERSION; HIERARCHICAL SYSTEMS; OPTIMIZATION;

DIGITAL CALIBRATION; PLATFORM-BASED DESIGN (PBD);

SPACE RESEARCH;

EID: 27944467965     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/dac.2005.193938     Document Type: Conference Paper

References (8)

1. H. Liu, A. Singhee, R. Rutenbar, and L. R. Carley, "Remembrance of circuits past: Macromodeling by data mining in large analog design spaces," in Proceedings of DAC, 2002.
2. T. Kiely and G. Gielen, "Performance modeling of analog integrated circuits using least-squares support vector machines," in Proc. of DATE, 2004.
3. G. Stehr, H. Graeb, and K. Antreich, "Analog performance space exploration by fourier-motzkion elimination with application to hierarchical sizing," in Proc. of ICCAD, 2004.
4. A. Sangiovanni Vincentelli, L. Carloni, F. De Bernardinis, and M. Sgroi, "Benefits and challenges for platform-based design," in Proceedings of DAC, pp. 409-414, June 2004.
5. F. D. Bernardinis, M. I. Jordan, and A. S. Vincentelli, "Support Vector Machines for Analog Circuit Performance Representation," in Proceedings of DAC, June 2003.
6. J. Platt, "Sequential minimal optimization: A fast algorithm for training support vector machines," Tech. Rep. MSR-TR-98-14, Microsoft Research, 1998.
7. P. Bunus and P. Fritzson, "A debugging scheme for declarative equation based modeling languages," in Practical Aspects of Decl. Languages: 4th Int. Symp., p. 280, 2002.
8. B. Murmann and B. E. Boser, "A 12-bit 75-MS/s, Pipelined ADC Using Open-Loop Residue Amplification," IEEE JSSC, vol. 38, pp. 2040-2050, December 2003.