Robust analog/RF circuit design with projection-based posynomial modeling

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn , Issue , 2004, Pages 855-862

  Li, Xin ^a   Gopalakrishnan, Padmini ^a   Xu, Yang ^a   Pileggi, Lawrence T ^a  

^a CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER SIMULATION; INTEGRATED CIRCUITS; MATHEMATICAL MODELS; OPTIMIZATION; PHOTOLITHOGRAPHY; TRANSISTORS;

CIRCUIT DESIGN; GEOMETRIC PROGRAMMING; POSYNOMIAL MODELING; ROBUST ANALOG DESIGN TOOL (ROAD);

INTEGRATED CIRCUIT LAYOUT;

EID: 16244368763     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (20)

1. G. Gielen and R. Rutenbar, "Computer-aided design of analog and mixed-signal integrated circuits," Proceedings of THE IEEE, vol. 88, no. 12, pp. 1825-1852, Dec. 2000.
2. M. Krasnicki, R. Phelps, R. Rutenbar and L. Carley, "MAELSTROM: efficient simulation-based synthesis for custom analog cells," IEEE DAC, pp. 945-950, 1999.
3. R. Phelps, M. Krasnicki, R. Rutenbar, L. Carley and J. Heliums, "Anaconda: simulation-based synthesis of analog circuits via stochastic pattern search," IEEE Trans. CAD, vol. 19, no. 6, pp. 703-717, Jun. 2000.
4. M. Krasnicki, R. Phelps, J. Heliums, M. McClung, R. Rutenbar and L. Carley, "ASP: a practical simulation-based methodology for the synthesis of custom analog circuits," IEEE ICCAD, pp. 350-357, 2001.
5. T. Mukherjee, L. Carley and R. Rutenbar, "Efficient handling of operating range and manufacturing line variations in analog cell synthesis," IEEE Trans. CAD, vol. 19, no. 8, pp. 825-839, Aug. 2000.
6. M. Hershenson, S. Mohan, S. Boyd and T. Lee, "Optimization of inductor circuits via geometric programming," IEEE DAC, pp. 994-998, 1999.
7. M. Hershenson, A. Hajimiri, S. Mohan, S. Boyd and T. Lee, "Design and optimization of LC oscillators," IEEE ICCAD, pp. 65-69, 1999.
8. M. Hershenson, S. Boyd and T. Lee, "Optimal design of a CMOS Op-Amp via geometric programming," IEEE Trans. CAD, vol. 20, no. 1, pp. 1-21, Jan. 2001.
9. S. Director, P. Feldmann and K. Krishna, "Statistical integrated circuit design," IEEE JSSC, vol. 28, no. 3, pp. 193-202, Mar. 1993.
10. A. Dharchoudhury and S. Kang, "Worst-case analysis and optimization of VLSI circuit performances," IEEE Trans. CAD, vol. 14, no. 4, pp. 481-492, Apr. 1995.
11. F. Schenkel, M. Pronath, S. Zizala, R. Schwencker, H. Graeb and K. Antreich, "Mismatch analysis and direct yield optimization by spec-wise linearation and feasibiliity-guided search," IEEE DAC, pp. 858-863, 2001.
12. W. Daems, O. Gielen and W. Sansen, "Simulation-based automatic generation of signomial and posynomial performance models for analog integrated circuit sizing," IEEE ICCAD, pp. 70-74, 2001.
13. W. Daems, G. Gielen and W. Sansen, "A fitting approach to generate synbolic expressions for linear and nonlinear analog circuit performance characteristics," IEEE DATE, pp. 268-273, 2002.
14. W. Daems, G. Gielen and W. Sansen, "An efficient optimization-based technique to generate posynomial performance models for analog integrated circuits," IEEE DAC, pp. 431-436, 2002.
15. T. Eeckelaert, W. Daems, G. Gielen and W. Sansen, "Generalized posynomial performance modeling," IEEE DATE, pp. 250-255, 2003.
16. D. Bertseksa, Nonlinear Programming, Athena Scientific, 1999.
17. Y. Saad, Iterative Methods for Sparse Linear Systems, PWS Publishing, 1996.
18. G. Golub and C. Loan, Matrix Computations, The Johns Hopkins Univ. Press, 1996.
19. X. Li, J. Le, P. Gopalakrishnan and L. Pileggi, "Asymptotic probability extraction for non-Normal distributions of circuit performance," IEEE ICCAD, 2004.
20. A. Hedayat, N. Sloane and J. Stufken, Orthogonal Arrays: Theory and Applications, New York: Springer-Verlag, 1999.