Engineering the complete MANOS-type NVM stack for best in class retention performance

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2009, Pages

  Gilmer, D C ^a   Goel, N ^a   Park, H ^a   Park, C ^a   Verma, S ^b   Bersuker, G ^a   Lysaght, P ^a   Tseng, H H ^a   Kirsch, P D ^a   Saraswat, K C ^b   Jammy, R ^a  

^a SEMATECH   (United States)

^b Texas State University San Marcos ^*

Author keywords

[No Author keywords available]

Indexed keywords

BLOCKING LAYERS; CHARGE LOSS; CHARGE TRAP; K -CYCLE; MULTILEVEL CELL; NONVOLATILE MEMORY DEVICES; PROGRAM/ERASE; STACK COMPONENTS;

DURABILITY; ELECTRON DEVICES; OXYGEN; SILICON NITRIDE;

FLASH MEMORY;

EID: 77952406581     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2009.5424331     Document Type: Conference Paper

References (11)

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