New insight on the charge trapping mechanisms of SiN-based memory by atomistic simulations and electrical modeling

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2009, Pages

  Vianello, E ^a,b   Perniola, L ^a   Blaise, P ^a   Molas, G ^a   Colonna, J P ^a   Driussi, F ^b   Palestri, P ^b   Esseni, D ^b   Selmi, L ^b   Rochat, N ^a   Licitra, C ^a   Lafond, D ^a   Kies, R ^a   Reimbold, G ^a   De Salvo, B ^a   Boulanger, F ^a  

^a CEA GRENOBLE   (France)

^b UNIVERSITY OF UDINE   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

ATOMISTIC SIMULATIONS; CHARGE LOSS; CHARGE TRAPPING MECHANISMS; DEFECT STATE; DEVICE CHARACTERISTICS; ELECTRICAL BEHAVIORS; ELECTRICAL MEASUREMENT; ELECTRICAL MODELING; ELECTRICAL SIMULATION; ELECTRON OCCUPATION; MATERIAL CHARACTERIZATIONS; NON-VOLATILE MEMORIES; PHYSICAL NATURE; SIMPLE TRAP MODELS; STATE OF THE ART;

CHARGE TRAPPING; COMPUTER PROGRAMMING; ELECTRON DEVICES;

SILICON NITRIDE;

EID: 77952405772     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2009.5424414     Document Type: Conference Paper

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