High resolution FPGA DPWM based on variable clock phase shifting

IEEE Transactions on Power Electronics

Volumn 25, Issue 5, 2010, Pages 1115-1119

  De Castro, Angel ^a   Todorovich, Elías ^a  

^a UNIVERSIDAD AUTÓNOMA DE MADRID   (Spain)

Author keywords

Digital control; Field programmable gate arrays (FPGAs); Pulsewidth modulation (PWM); Signal resolution

Indexed keywords

CLOCK MANAGEMENT; CLOCK PHASE; DIGITAL CONTROL; HIGH RESOLUTION; INPUT AND OUTPUTS; PHASE-SHIFTING; PROGRAMMABLE DELAY; PULSE WIDTH MODULATORS; SIGNAL RESOLUTION; TIME RESOLUTION; VERY HIGH RESOLUTION;

CLOCKS; DIGITAL CONTROL SYSTEMS; INDUCTION MOTORS; LOGIC GATES; PHASE SHIFT; PULSE MODULATION;

PULSE WIDTH MODULATION;

EID: 77952218849     PISSN: 08858993     EISSN: None     Source Type: Journal    
DOI: 10.1109/TPEL.2009.2037818     Document Type: Article

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