Digital pulse width modulator architectures

PESC Record - IEEE Annual Power Electronics Specialists Conference

Volumn 6, Issue , 2004, Pages 4689-4695

  Syed, Asif ^a   Ahmed, Ershad ^a   Maksimović, Dragan ^a   Alarcón, Eduard ^b  

^a University of Colorado at Boulder   (United States)

^b UNIVERSITAT POLITÈCNICA DE CATALUNYA   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

FREQUENCY SYNCHRONIZATION; POWER CONSUMPTION; PULSE WIDTH; SWITCHING FREQUENCY;

ANALOG TO DIGITAL CONVERSION; CMOS INTEGRATED CIRCUITS; DIGITAL SIGNAL PROCESSING; ELECTRIC DELAY LINES; NETWORKS (CIRCUITS); OSCILLATIONS; PULSE MODULATION; PULSE WIDTH MODULATION; SILICON; SWITCHING;

MODULATORS;

EID: 8744232112     PISSN: 02759306     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/PESC.2004.1354828     Document Type: Conference Paper

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