메뉴 건너뛰기




Volumn 20, Issue 4, 2010, Pages 496-504

A reconfigurable embedded system for 1000 f/s real-time vision

Author keywords

FPGA; High frame rate real time vision; High speed vision; Parallel processing

Indexed keywords

ALGORITHM IMPLEMENTATION; APPLICATION EXAMPLES; CENTRAL PROCESSING UNITS; CO-PROCESSORS; DESCRIPTORS; DIRECT-MEMORY-ACCESS CONTROLLERS; EMBEDDED MICROPROCESSORS; EVALUATION SYSTEM; FRAME-RATE; HIGH SPEED VISION; MEMORY UNITS; PARALLEL PROCESSING; PERFORMANCE EVALUATION; PROCESSING UNITS; PROPOSED ARCHITECTURES; RE-CONFIGURABLE; REAL TIME VISION; RECONFIGURABILITY; RECONFIGURABLE EMBEDDED SYSTEMS;

EID: 77951139927     PISSN: 10518215     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSVT.2009.2035832     Document Type: Article
Times cited : (14)

References (30)
  • 5
  • 6
    • 17144398762 scopus 로고    scopus 로고
    • Two-dimensional tracking of a motile microorganism allowing high-resolution observation with various imaging techniques
    • H. Oku, N. Ogawa, K. Hashimoto, and M. Ishikawa, "Two-dimensional tracking of a motile microorganism allowing high-resolution observation with various imaging techniques," Rev. Sci. Instr., vol.76, no.3, pp. 034301-1-034301-9, 2005.
    • (2005) Rev. Sci. Instr. , vol.76 , Issue.3 , pp. 0343011-0343019
    • Oku, H.1    Ogawa, N.2    Hashimoto, K.3    Ishikawa, M.4
  • 7
  • 12
    • 36349021354 scopus 로고    scopus 로고
    • 955-fps real-time shape measurement of a moving/deforming object using high-speed vision for numerous-point analysis
    • Y. Watanabe, T. Komuro, and M. Ishikawa, "955-fps real-time shape measurement of a moving/deforming object using high-speed vision for numerous-point analysis," in Proc. IEEE Int. Conf. Robotics Automat., 2007, pp. 3192-3197.
    • (2007) Proc. IEEE Int. Conf. Robotics Automat. , pp. 3192-3197
    • Watanabe, Y.1    Komuro, T.2    Ishikawa, M.3
  • 14
    • 0038273896 scopus 로고    scopus 로고
    • Synthesis of high-dynamic range motion blur free image from multiple captures
    • Apr.
    • X. Liu and A. Gamal, "Synthesis of high-dynamic range motion blur free image from multiple captures," IEEE Trans. Circuits Syst. I: Fundam. Theory Applicat., vol.50, no.4, pp. 530-539, Apr. 2003.
    • (2003) IEEE Trans. Circuits Syst. I: Fundam. Theory Applicat. , vol.50 , Issue.4 , pp. 530-539
    • Liu, X.1    Gamal, A.2
  • 16
    • 24144501313 scopus 로고    scopus 로고
    • Optical flow estimation using temporally oversampled video
    • Aug.
    • S. Lim, J. Apostolopoulos, and A. Gamal, "Optical flow estimation using temporally oversampled video," IEEE Trans. Image Process., vol.14, no.8, pp. 1074-1087, Aug. 2005.
    • (2005) IEEE Trans. Image Process. , vol.14 , Issue.8 , pp. 1074-1087
    • Lim, S.1    Apostolopoulos, J.2    Gamal, A.3
  • 18
    • 33845599565 scopus 로고    scopus 로고
    • CMOS+FPGA vision system for visual feedback of mechanical systems
    • K. Shimizu and S. Hirai, "CMOS+FPGA vision system for visual feedback of mechanical systems," in Proc. IEEE Int. Conf. Robotics Automat., 2006, pp. 2060-2065.
    • (2006) Proc. IEEE Int. Conf. Robotics Automat. , pp. 2060-2065
    • Shimizu, K.1    Hirai, S.2
  • 22
    • 27644599162 scopus 로고    scopus 로고
    • An integrated memory array processor architecture for embedded image recognition systems
    • S. Kyo, S. Okazaki, and T. Arai, "An integrated memory array processor architecture for embedded image recognition systems," in Proc. Int. Symp. Comput. Archit., 2005, pp. 134-145.
    • (2005) Proc. Int. Symp. Comput Archit. , pp. 134-145
    • Kyo, S.1    Okazaki, S.2    Arai, T.3
  • 23
    • 0030241068 scopus 로고    scopus 로고
    • VLSI implementation of a focal plane image processor: A realization of the near-sensor image processing concept
    • Sep.
    • J. Eklund, C. Svensson, and A. A°ström, "VLSI implementation of a focal plane image processor: A realization of the near-sensor image processing concept," IEEE Trans. Very Large Scale Integrat.(VLSI) Syst., vol.4, no.3, pp. 322-335, Sep. 1996.
    • (1996) IEEE Trans. Very Large Scale Integrat.(VLSI) Syst. , vol.4 , Issue.3 , pp. 322-335
    • Eklund, J.1    Svensson, C.2    Aström, A.3
  • 24
    • 0742286333 scopus 로고    scopus 로고
    • A dynamically reconfigurable SIMD processor for a vision chip
    • Jan.
    • T. Komuro, S. Kagami, and M. Ishikawa, "A dynamically reconfigurable SIMD processor for a vision chip," IEEE J. Solid-State Circuits, vol.39, no.1, pp. 265-268, Jan. 2004.
    • (2004) IEEE J. Solid-State Circuits , vol.39 , Issue.1 , pp. 265-268
    • Komuro, T.1    Kagami, S.2    Ishikawa, M.3
  • 25
    • 12944266782 scopus 로고    scopus 로고
    • A general-purpose processor-per-pixel analog SIMD vision chip
    • Jan.
    • P. Dudek and P. Hicks, "A general-purpose processor-per-pixel analog SIMD vision chip," IEEE Trans. Circuits Syst. I: Regular Papers, vol.52, no.1, pp. 13-20, Jan. 2005.
    • (2005) IEEE Trans. Circuits Syst. I: Regular Papers , vol.52 , Issue.1 , pp. 13-20
    • Dudek, P.1    Hicks, P.2
  • 26
    • 44649096913 scopus 로고    scopus 로고
    • A programmable SIMD vision chip for real-time vision applications
    • Jun.
    • W. Miao, Q. Lin, W. Zhang, and N. Wu, "A programmable SIMD vision chip for real-time vision applications," IEEE J. Solid-State Circuits, vol.43, no.6, pp. 1470-1479, Jun. 2008.
    • (2008) IEEE J. Solid-State Circuits , vol.43 , Issue.6 , pp. 1470-1479
    • Miao, W.1    Lin, Q.2    Zhang, W.3    Wu, N.4
  • 28
    • 85008020071 scopus 로고    scopus 로고
    • A programmable 512 GOPS stream processor for signal, image, and video processing
    • Jan.
    • B. Khailany, T. Williams, J. Lin, E. Long, M. Rygh, D. Tovey, and W. Dally, "A programmable 512 GOPS stream processor for signal, image, and video processing," IEEE J. Solid-State Circuits, vol.43, no.1, pp. 202-213, Jan. 2008.
    • (2008) IEEE J. Solid-State Circuits , vol.43 , Issue.1 , pp. 202-213
    • Khailany, B.1    Williams, T.2    Lin, J.3    Long, E.4    Rygh, M.5    Tovey, D.6    Dally, W.7


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.